LPC1111FDH20/002,5 NXP Semiconductors, LPC1111FDH20/002,5 Datasheet - Page 25
LPC1111FDH20/002,5
Manufacturer Part Number
LPC1111FDH20/002,5
Description
ARM Microcontrollers - MCU CortexM0 32bit 8KB
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1114FN2810212.pdf
(114 pages)
Specifications of LPC1111FDH20/002,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1111
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
8 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
Factory Pack Quantity
2500
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Table 7.
[1]
[2]
[3]
[4]
[5]
[6]
LPC111X
Product data sheet
Symbol
PIO1_6/RXD/
CT32B0_MAT0
PIO1_7/TXD/
CT32B0_MAT1
PIO1_8/
CT16B1_CAP0
PIO1_9/
CT16B1_MAT0
V
V
XTALIN
XTALOUT
V
V
DD
DDA
SS
SSA
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to full V
no pull-up/down enabled.
See
reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down
mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see
I
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
2
C-bus pads compliant with the I
Figure 48
LPC1100L series: LPC1112/14 pin description table (TSSOP28 and DIP28 packages)
for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to
15
16
17
18
21
7
19
22
8
20
[3]
[3]
[3]
[3]
[6]
[6]
2
Start
logic
input
no
no
no
no
-
-
-
-
-
-
C-bus specification for I
Type Reset
I/O
I
O
I/O
O
O
I/O
I
I/O
O
-
I
O
-
All information provided in this document is subject to legal disclaimers.
state
[1]
I; PU
-
-
I; PU
-
-
I; PU
-
I; PU
-
-
-
-
-
-
-
Rev. 8 — 20 February 2013
2
C standard mode and I
Description
PIO1_6 — General purpose digital input/output pin.
RXD — Receiver input for UART.
CT32B0_MAT0 — Match output 0 for 32-bit timer 0.
PIO1_7 — General purpose digital input/output pin.
TXD — Transmitter output for UART.
CT32B0_MAT1 — Match output 1 for 32-bit timer 0.
PIO1_8 — General purpose digital input/output pin.
CT16B1_CAP0 — Capture input 0 for 16-bit timer 1.
PIO1_9 — General purpose digital input/output pin.
CT16B1_MAT0 — Match output 0 for 16-bit timer 1.
3.3 V supply voltage to the internal regulator and the external rail.
3.3 V supply voltage to the ADC. Also used as the ADC reference
voltage.
Input to the oscillator circuit and internal clock generator circuits.
Input voltage must not exceed 1.8 V.
Output from the oscillator amplifier.
Ground.
Analog ground.
LPC1110/11/12/13/14/15
2
C Fast-mode Plus.
32-bit ARM Cortex-M0 microcontroller
Figure
…continued
DD
© NXP B.V. 2013. All rights reserved.
47).
level ); IA = inactive,
Figure
25 of 114
47).
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