MPC8536ECVTATLA Freescale Semiconductor, MPC8536ECVTATLA Datasheet - Page 2

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MPC8536ECVTATLA

Manufacturer Part Number
MPC8536ECVTATLA
Description
Microprocessors - MPU 8536 ENCRYPTED
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8536ECVTATLA

Product Category
Microprocessors - MPU
Rohs
yes
Processor Series
PowerQUICC III
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
250 MHz
Program Memory Size
32 KB
Data Ram Size
512 KB
Interface Type
I2C, USB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
0 C to + 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-783
1
2
2
Pin Assignments and Reset States . . . . . . . . . . . . . . . . . . . . .3
1.1
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10 Ethernet Management Interface Electrical Characteristics
2.11 USB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62
2.12 enhanced Local Bus Controller (eLBC) . . . . . . . . . . . .65
2.13 Enhanced Secure Digital Host Controller (eSDHC) . . .74
2.14 Programmable Interrupt Controller (PIC) . . . . . . . . . . .76
2.15 JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
2.16 Serial ATA (SATA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78
2.17 I
2.18 GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87
2.19 PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88
2.20 High-Speed Serial Interfaces . . . . . . . . . . . . . . . . . . . .90
Pin Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Overall DC Electrical Characteristics . . . . . . . . . . . . . .21
Power Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .26
Input Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . .30
DDR2 and DDR3 SDRAM . . . . . . . . . . . . . . . . . . . . . .31
eSPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Ethernet: Enhanced Three-Speed Ethernet (eTSEC),
MII Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
60
2
C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Table of Contents
3
4
5
6
7
2.21 PCI Express. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
2.23 Clocking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
2.24 Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Hardware Design Considerations . . . . . . . . . . . . . . . . . . . . 113
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10 JTAG Configuration Signals . . . . . . . . . . . . . . . . . . . 117
3.11 Guidelines for High-Speed Interface Termination . . . 119
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
4.1
4.2
4.3
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
5.1
5.2
Product Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . 125
System Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Power Supply Design and Sequencing . . . . . . . . . . . 113
Pin States in Deep Sleep State . . . . . . . . . . . . . . . . . 114
Decoupling Recommendations . . . . . . . . . . . . . . . . . 114
SerDes
Recommendations. . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Connection Recommendations . . . . . . . . . . . . . . . . . 115
Pull-Up and Pull-Down Resistor Requirements . . . . . 115
Output Buffer DC Impedance . . . . . . . . . . . . . . . . . . 115
Configuration Pin Muxing . . . . . . . . . . . . . . . . . . . . . 116
Part Numbers Fully Addressed by this Document. . . 121
Part Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Part Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Package Parameters for the FC-PBGA . . . . . . . . . . . 123
Mechanical Dimensions of the FC-PBGA . . . . . . . . . 124
Block
Power
Freescale Semiconductor
Supply
Decoupling

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