74AVC2T45DP,125 NXP Semiconductors, 74AVC2T45DP,125 Datasheet - Page 15

• Manufacturer Part Number: 74AVC2T45DP,125
• Description: IC BUS TRANSCVR TRI-ST DL 8TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AVCr

Specifications of 74AVC2T45DP,125

• Package / Case: 8-TSSOP
• Logic Function: Translator, Bidirectional, 3-State
• Number Of Bits: 2
• Input Type: Logic
• Output Type: Logic
• Number Of Channels: 2
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Propagation Delay (max): 2.4ns
• Voltage - Supply: 0.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Supply Voltage: 0.8 V ~ 3.6 V
• Mounting Style: SMD/SMT
• Data Rate: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74AVC2T45DP-G; 74AVC2T45DP-G; 935286774125

NXP Semiconductors
74AVC2T45
Product data sheet
Fig 10. Bidirectional logic level-shifting application
DIR CTRL
System-1 and system-2 must use the same conditions, i.e., both pull-up or both pull-down.
V
I/O-1
CC1
13.2 Bidirectional logic level-shifting application
system-1
PULL-UP/DOWN
Figure 10
application. Since the device does not have an output enable (OE) pin, the system
designer should take precautions to avoid bus contention between system-1 and
system-2 when changing directions.
Table 17
and then from system-2 to system-1.
Table 17.
[1]
[2]
State DIR CTRL I/O-1
1
2
3
4
System-1 and system-2 must use the same conditions, i.e., both pull-up or both pull-down.
H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
H
H
L
L
gives a sequence that will illustrate data transmission from system-1 to system-2
shows the 74AVC2T45 being used in a bidirectional logic level-shifting
V
Bidirectional logic level-shifting application
CC1
All information provided in this document is subject to legal disclaimers.
V
CC(A)
GND
output
Z
Z
input
1A
2A
Dual-bit, dual-supply voltage level translator/transceiver; 3-state
Rev. 5 — 30 November 2010
1
2
3
4
74AVC2T45
I/O-2
input
Z
Z
output
Description
system-2 is getting ready to send data to system-1.
I/O-1 and I/O-2 are disabled. The bus-line state
depends on the pull-up or pull-down.
DIR bit is set LOW. I/O-1 and I/O-2 still are disabled.
The bus-line state depends on the pull-up or pull-down.
system-1 data to system-2
system-2 data to system-1
8
7
6
5
V
1B
2B
DIR
CC(B)
V
[1][2]
CC2
PULL-UP/DOWN
system-2
74AVC2T45
© NXP B.V. 2010. All rights reserved.
DIR CTRL
V
I/O-2
CC2
001aag582
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