74AVC4T245D,118 NXP Semiconductors, 74AVC4T245D,118 Datasheet - Page 14

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74AVC4T245D,118

Manufacturer Part Number
74AVC4T245D,118
Description
TXRX 4BIT DUAL 3STATE 16SOIC
Manufacturer
NXP Semiconductors
Series
74AVCr
Datasheet

Specifications of 74AVC4T245D,118

Output Type
Logic
Package / Case
16-SOIC (3.9mm Width)
Logic Function
Translator, Bidirectional, 3-State
Number Of Bits
4
Input Type
Logic
Number Of Channels
4
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.3ns
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
*
Logic Family
AVC
Number Of Channels Per Chip
4
Input Level
CMOS
Output Level
CMOS
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
14.5 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Function
Bus Transceiver with Voltage Translation
Input Bias Current (max)
70 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Non-Inverting
Logic Type
CMOS
Number Of Circuits
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935288131118
NXP Semiconductors
12. Waveforms
Table 15.
[1]
[2]
74AVC4T245
Product data sheet
Supply voltage
V
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Fig 7.
Fig 8.
CC(A)
V
V
CCI
CCO
, V
is the supply voltage associated with the data input port.
CC(B)
is the supply voltage associated with the output port.
Measurement points are given in
V
The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
Measurement points are given in
V
Enable and disable times
OL
OL
Measurement points
and V
and V
OH
OH
are typical output voltage levels that occur with the output load.
are typical output voltage levels that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
Input
V
0.5V
0.5V
0.5V
LOW-to-OFF
OFF-to-LOW
nOE input
M
output
output
CCI
CCI
CCI
[1]
nBn, nAn output
nAn, nBn input
V
GND
GND
V
Table
CCO
Table
V
OH
OL
V
All information provided in this document is subject to legal disclaimers.
I
GND
15.
15.
V
V
OH
OL
V
I
Rev. 2 — 9 December 2010
V
M
enabled
Output
V
0.5V
0.5V
0.5V
t
outputs
PLZ
t
PHZ
M
CCO
CCO
CCO
V
[2]
V
M
X
V
V
Y
M
t
PHL
4-bit dual supply translating transceiver; 3-state
disabled
outputs
V
V
V
V
X
OL
OL
OL
t
PZL
t
PZH
+ 0.1 V
+ 0.15 V
+ 0.3 V
001aak285
t
PLH
V
M
V
001aak286
M
outputs
enabled
74AVC4T245
V
V
V
V
Y
OH
OH
OH
© NXP B.V. 2010. All rights reserved.
− 0.1 V
− 0.15 V
− 0.3 V
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