74ALVC164245DL,118 NXP Semiconductors, 74ALVC164245DL,118 Datasheet - Page 11

• Manufacturer Part Number: 74ALVC164245DL,118
• Description: IC TRNSCVR 3-ST DL 16BIT 48SSOP
• Manufacturer: NXP Semiconductors
• Series: 74ALVCr

Specifications of 74ALVC164245DL,118

• Output Type: Logic
• Package / Case: 48-SSOP
• Logic Function: Level Shifter, 3-State
• Number Of Bits: 16
• Input Type: Logic
• Number Of Channels: 16
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Propagation Delay (max): 7.5ns
• Voltage - Supply: 1.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Supply Voltage: 2.3 V ~ 5.5 V
• Logic Family: ALVC
• Number Of Channels Per Chip: 16
• Input Level: LVTTL
• Output Level: LVTTL
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Propagation Delay Time: 4.3 ns
• Supply Voltage (max): 3.6 V, 5.5 V
• Supply Voltage (min): 1.5 V
• Maximum Operating Temperature: + 125 C
• Function: Bus Transceiver with Voltage Translation
• Input Bias Current (max): 80 uA
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Polarity: Non-Inverting
• Logic Type: CMOS
• Number Of Circuits: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74ALVC164245DL-T; 74ALVC164245DL-T; 935202340118

NXP Semiconductors
Table 7.
GND = 0 V; t
[1]
[2]
[3]
[4]
11. AC waveforms
74ALVC164245_5
Product data sheet
Symbol Parameter
C
Fig 5.
PD
All typical values are measured at nominal voltage for V
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
The condition is V
pd
en
dis
i
o
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
= C
is the same as t
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
power
dissipation
capacitance
Measurement points are given in
V
Input (nAn, nBn) to output (nBn, nAn) propagation delays
PD
OL
Dynamic characteristics
CC
r
× V
= t
2
and V
× f
CC
f
≤
o
2
) = sum of outputs.
2.5 ns; C
OH
× f
I
PLH
PZL
= GND to V
PLZ
i
are typical output voltage levels that occur with the output load.
× N + Σ(C
and t
and t
and t
Conditions
5 V port: nAn to nBn;
V
3 V port: nBn to nAn;
V
L
PZH
PHL
PHZ
CC(B)
CC(B)
= 50 pF; for test circuit see
outputs enabled
outputs disabled
outputs enabled
outputs disabled
L
CC
.
.
.
× V
.
= 5 V; V
= 5 V; V
CC
nAn, nBn
nBn, nAn
output
2
input
…continued
× f
Table
o
All information provided in this document is subject to legal disclaimers.
) where:
CC(A)
CC(A)
GND
V
V
OH
OL
8.
V
I
= 3.3 V
= 3.3 V
t
PHL
Rev. 05 — 13 April 2010
CC(B)
D
V
Figure
[3][4]
[3][4]
in μW).
M
and V
V
M
T
CC(A)
7.
amb
Min
16-bit dual supply translating transceiver; 3-state
-
-
-
-
and at T
=
−40 °C to +85 °C
Typ
30
15
40
5
amb
[1]
= 25 °C.
001aaa792
t
PLH
Max
-
-
-
-
74ALVC164245
T
amb
Min
=
-
-
-
-
−40 °C to +125 °C Unit
© NXP B.V. 2010. All rights reserved.
Max
-
-
-
-
11 of 20
pF
pF
pF
pF