XRT91L80ES Exar, XRT91L80ES Datasheet - Page 12

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XRT91L80ES

Manufacturer Part Number
XRT91L80ES
Description
Bus Transceivers Transceiver
Manufacturer
Exar
Datasheet

Specifications of XRT91L80ES

Product Category
Bus Transceivers
Rohs
yes
POWER AND GROUND
XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
RECEIVER SECTION
AVDD3.3_RX
AVDD1.8_RX
AVDD3.3_TX
LOSDMUTE
VDD3.3
VDD1.8
POLARITY
N
LOSDET
AME
N
AME
PWR
PWR
PWR
PWR
PWR
T
YPE
LVCMOS
LVCMOS
LVCMOS
LVTTL,
LVTTL,
L
EVEL
A13, B7, B13, D12, E12,
A8, D9, D10, D11, E11,
K11, L9, L10, M9, M10,
D4, D5, D6, D8, F3, G3
P13, P14
D3, E3
P5, P9
T
M11
P
YPE
O
IN
I
I
P
C4
C5
A3
IN
CMOS Digital 3.3V I/O Power Supply
VDD3.3 should be isolated from the analog power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The VDD3.3 power supply pins should have bypass
capacitors to the nearest ground.
Analog 3.3V I/O Receiver Power Supply
AVDD3.3_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_RX power supply pins should
have bypass capacitors to the nearest ground.
Analog 3.3V I/O Transmitter Power Supply
AVDD3.3_TX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD3.3_TX power supply pins should
have bypass capacitors to the nearest ground.
CMOS Digital 1.8V Core Power Supply
VDD1.8 should be isolated from the analog power supplies. For
best results, use a ferrite bead along with an internal power plane
separation. The VDD1.8 power supply pins should have bypass
capacitors to the nearest ground.
Analog 1.8V Core Receiver Power Supply
AVDD1.8_RX should be isolated from the digital power supplies.
For best results, use a ferrite bead along with an internal power
plane separation. The AVDD1.8_RX power supply pins should
have bypass capacitors to the nearest ground.
Polarity for SDEXT Input
Controls the Signal Detect polarity convention of SDEXT.
"Low" = SDEXT is active "Low."
"High" = SDEXT is active "High."
This pin is provided with an internal pull-down.
LOS Detect Condition
Flags LOSD condition based on SDEXT signal coming from the
optical module.
"Low" = No Alarm
"High" = A LOS condition is present
Parallel Receive Data Output Mute Upon LOSD
If this pin is asserted "High", the receive data output will auto-
matically be forced to a logic state of "0" when an LOSD condi-
tion occurs.
"Low" = Disabled
"High" = Mute RXDO[3:0]P/N Data Upon LOSD Condition
This pin is provided with an internal pull-down.
10
D
D
ESCRIPTION
ESCRIPTION
xr
xr
xr
xr
REV. 1.0.0

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