XRT91L80ES Exar, XRT91L80ES Datasheet - Page 46

• Manufacturer Part Number: XRT91L80ES
• Description: Bus Transceivers Transceiver
• Manufacturer: Exar

Specifications of XRT91L80ES

• Product Category: Bus Transceivers
• Rohs: yes

REVISION HISTORY
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REV. 1.0.0
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2007 EXAR Corporation
Datasheet January 2007.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
R
EVISION
P.2.0.1
P1.0.6
P1.1.0
P2.0.0
#
January 2006
January 2007
July 2005
July 2005
D
ATE
1.Updated CML input swing characteristics table.
2.Updated CDR and CMU jitter performance parameters.
3.Updated Intrinsic Transmit and Receive Phase Noise performance plots.
4.Updated AC/DC electrical characteristics tables.
1.Revision E silicon: CMOS Digital 1.8V power pins P13 and P14 changed to 3.3V.
2.Revision E silicon: ALTFREQSEL default clock selection changed to 155.52 MHz.
1.Updated TXPCLKIP/N (t
2.Added RXPCLKOP/N (t
3.Added RXPCLKOP/N (RX
Changed the Max values of t
Changed the Min values of t
Changed the Max value of TX
Enhanced Figure 16, Figure 17 and Figure 18.
Added Figure 21 and Figure 23
Changed TOL
Changed the V
Logic Signal DC Electrical Characteristics
Changed I
table
Changed I
acteristics
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
DD_1.8
LEAK_PU
JIT
ISINGLE
and I
Min value from 0.4 UI to 0.35 UI in Table 3
NOTICE
and I
DD_IO
43
Max value from 600 mV to 500 mV in the Common Mode
LEAK_PD
RX_INV
TXDI_SU
DUTY
TXDI_SU
in the Power and Current DC Electrical Characteristics
RX_IN
DUTY
) invalid and (t
) typical duty cycle.
in the LVTTL/LVCMOS Signal DC Electrical Char-
) setup and (t
and t
Table 7 from 55 to 58 ps
D
and t
ESCRIPTION
RX_DEL
TXDI_HD
RX_DEL
TXDI_HD
in Table 5 from 200 to 300 ps
in Table 6 from 200 to 300 ps
) data typical delay time.
) hold time.
XRT91L80