74AVC16245DGG-T NXP Semiconductors, 74AVC16245DGG-T Datasheet

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74AVC16245DGG-T

Manufacturer Part Number
74AVC16245DGG-T
Description
Bus Transceivers 16-BIT TRANSCVR 3-S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AVC16245DGG-T

Product Category
Bus Transceivers
Rohs
yes
Logic Type
CMOS
Logic Family
AVC
Number Of Channels Per Chip
16
Input Level
CMOS
Output Level
CMOS
Output Type
3-State
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
2.3 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.2 V
Maximum Operating Temperature
+ 85 C
Package / Case
TSSOP-48
Function
Bus Transceiver
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Circuits
2
Polarity
Non-Inverting
Factory Pack Quantity
2000
Part # Aliases
74AVC16245DGG,518
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number
74AVC16245DGG
Ordering information
Package
Temperature range Name
40 C to +85 C
The 74AVC16245 is a 16-bit transceiver featuring non-inverting 3-state bus compatible
outputs in both send and receive directions. The device features two output enable inputs
(nOE) for easy cascading and two send/receive inputs (nDIR) for direction control.
Inputs nOE control the outputs so that the buses are effectively isolated. This device can
be used as two 8-bit transceivers or one 16-bit transceiver.
The 74AVC16245 is designed to have an extremely fast propagation delay and a
minimum amount of power consumption.
To ensure the high-impedance output state during power-up or power-down, tie pins nOE
to V
A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line
drive during transient (see
74AVC16245
16-bit transceiver with direction pin; 3.6 V tolerant; 3-state
Rev. 3 — 31 January 2013
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standards:
CMOS low power consumption
Input/output tolerant up to 3.6 V
Dynamic Controlled Output (DCO) circuit dynamically changes output impedance,
resulting in noise reduction without speed degradation
Low inductance multiple VCC and GND pins to minimize noise and ground bounce
Supports Live Insertion
CC
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-1A (2.7 V to 3.6 V)
through a pull-up resistor (Live Insertion).
TSSOP48
Figure 4
Description
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
and
Figure
5)
Product data sheet
Version
SOT362-1

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74AVC16245DGG-T Summary of contents

Page 1

... Low inductance multiple VCC and GND pins to minimize noise and ground bounce  Supports Live Insertion 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +85 C 74AVC16245DGG Figure 4 and Figure 5) Description TSSOP48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm Product data sheet ...

Page 2

... NXP Semiconductors 4. Functional diagram 1DIR 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 Fig 1. Logic symbol 74AVC16245 Product data sheet 16-bit transceiver with direction pin; 3.6 V tolerant; 3-state 2DIR 1OE 2A0 1B0 2A1 1B1 2A2 1B2 2A3 1B3 2A4 1B4 2A5 1B5 ...

Page 3

... NXP Semiconductors Fig 2. IEC logic symbol 74AVC16245 Product data sheet 16-bit transceiver with direction pin; 3.6 V tolerant; 3-state 1OE G3 1DIR 3EN1[BA] 3EN2[AB] G6 2OE 6EN1[BA] 2DIR 6EN2[AB] 1B0 1A0 1 2 1A1 1B1 1A2 1B2 1B3 1A3 1A4 1B4 1A5 1B5 1B6 1A6 1A7 ...

Page 4

... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 3. Pin configuration 74AVC16245 Product data sheet 16-bit transceiver with direction pin; 3.6 V tolerant; 3-state $9& 2( ', $ %   $ %   *1' * $ %   $ %   && && % $   % $   *1' * $ %   $ %   $ %   % $   ...

Page 5

... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin 1DIR, 2DIR 1, 24 1B0 to 1B7 11, 12 2B0 to 2B7 13, 14, 16, 17, 19, 20, 22, 23 GND 4, 10, 15, 21, 28, 34, 39 18, 31 1OE, 2OE 48, 25 1A0 to 1A7 47, 46, 44, 43, 41, 40, 38, 37 ...

Page 6

... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). ...

Page 7

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF I OFF-state output current OZ I supply current CC C input capacitance I [1] All typical values are measured ...

Page 8

... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter t propagation delay pd t enable time en t disable time dis C power dissipation PD capacitance [ the same as t and PLH PHL t is the same as t and t ...

Page 9

... NXP Semiconductors 11. Waveforms Measurement points are given in Logic levels: V and Fig 6. The input (nAn, nBn) to output (nBn, nAn) propagation delays nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 7 ...

Page 10

... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 8. Test circuit for measuring switching times Table 9 ...

Page 11

... NXP Semiconductors 12. Package outline TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 12

... Release date Data sheet status 74AVC16245 v.3 20130131 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 74AVC16245 v.2 19991115 74AVC16245 v.1 19981211 ...

Page 13

... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 14

... V tolerant; 3-state NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 15

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics 9.1 Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 Package outline ...

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