M95256-DFDW6TP STMicroelectronics, M95256-DFDW6TP Datasheet - Page 28
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M95256-DFDW6TP
Manufacturer Part Number
M95256-DFDW6TP
Description
EEPROM 256-Kbit serial SPI bus EEPROM
Manufacturer
STMicroelectronics
Datasheet
1.M95256-DFDW6TP.pdf
(53 pages)
Specifications of M95256-DFDW6TP
Rohs
yes
Memory Size
256 Kbit
Organization
32768 x 8 bit
Data Retention
200 yr
Maximum Clock Frequency
20 MHz
Maximum Operating Current
5 mA
Operating Supply Voltage
1.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Interface Type
SPI
Minimum Operating Temperature
- 40 C
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.7 V
Available stocks
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Instructions
6.9
Figure 17. Read Lock Status sequence
28/53
Read Lock Status (available only in M95256-D devices)
The Read Lock Status instruction (see
Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with
the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are
then shifted in on Serial Data Input (D). Address bit A10 must be 1, all other address bits are
Don't Care. The Lock bit is the LSB (least significant bit) of the byte read on Serial Data
Output (Q). It is at “1” when the lock is active and at “0” when the lock is not active. If Chip
Select (S) continues to be driven low, the same data byte is shifted out. The read cycle is
terminated by driving Chip Select (S) high.
The instruction sequence is shown in
Doc ID 12276 Rev 19
Figure
Table
M95256-W M95256-R M95256-DR M95256-DF
17.
4) is used to check whether the Identification