M95256-DFDW6TP STMicroelectronics, M95256-DFDW6TP Datasheet - Page 30

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M95256-DFDW6TP

Manufacturer Part Number
M95256-DFDW6TP
Description
EEPROM 256-Kbit serial SPI bus EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95256-DFDW6TP

Rohs
yes
Memory Size
256 Kbit
Organization
32768 x 8 bit
Data Retention
200 yr
Maximum Clock Frequency
20 MHz
Maximum Operating Current
5 mA
Operating Supply Voltage
1.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Interface Type
SPI
Minimum Operating Temperature
- 40 C
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.7 V

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Power-up and delivery state
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7.1
7.2
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Power-up and delivery state
Power-up state
After power-up, the device is in the following state:
The SRWD, BP1 and BP0 bits of the Status Register are unchanged from the previous
power-down (they are non-volatile bits).
Initial delivery state
The device is delivered with the memory array set to all 1s (each byte = FFh). The Status
Register Write Disable (SRWD) and Block Protect (BP1 and BP0) bits are initialized to 0.
Standby power mode,
deselected (after power-up, a falling edge is required on Chip Select (S) before any
instructions can be started),
not in the Hold condition,
the Write Enable Latch (WEL) is reset to 0,
Write In Progress (WIP) is reset to 0.
Doc ID 12276 Rev 19
M95256-W M95256-R M95256-DR M95256-DF

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