M24C04-FMC5TG STMicroelectronics, M24C04-FMC5TG Datasheet - Page 14
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M24C04-FMC5TG
Manufacturer Part Number
M24C04-FMC5TG
Description
EEPROM 4Kbit 100kHz I2C 400 kHZ Fast-Mode
Manufacturer
STMicroelectronics
Datasheet
1.M24C04-FMC5TG.pdf
(32 pages)
Specifications of M24C04-FMC5TG
Product Category
EEPROM
Rohs
yes
Available stocks
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Instructions
5.1.1
14/32
Byte Write
After the device select code and the address byte, the bus master sends one data byte. If
the addressed location is Write-protected, by Write Control (WC) being driven high, the
device replies with NoAck, and the location is not modified. If, instead, the addressed
location is not Write-protected, the device replies with Ack. The bus master terminates the
transfer by generating a Stop condition, as shown in
Figure 5.
WC
Byte Write
WC
Page Write
WC (cont'd)
Page Write
(cont'd)
Write mode sequences with WC = 0 (data write enabled)
Dev Select
Dev Select
ACK
Doc ID 023994 Rev 2
Data in N
R/W
R/W
ACK
ACK
Byte address
Byte address
ACK
ACK
ACK
Data in 1
Figure
Data in
M24C04-W M24C04-R M24C04-F
5.
ACK
ACK
Data in 2
ACK
Data in 3
AI02804c