M95320-DRMC6TG STMicroelectronics, M95320-DRMC6TG Datasheet - Page 28

• Manufacturer Part Number: M95320-DRMC6TG
• Description: EEPROM 32Kb SPI bus EEPROM 20 MHz 4kB
• Manufacturer: STMicroelectronics

Specifications of M95320-DRMC6TG

• Rohs: yes

Instructions
6.9
Figure 16. Read Lock Status sequence
28/46
Read Lock Status (available only in M95320-D devices)
The Read Lock Status instruction (see
Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with
the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are
then shifted in on Serial Data Input (D). Address bit A10 must be 1, all other address bits are
Don't Care. The Lock bit is the LSB (least significant bit) of the byte read on Serial Data
Output (Q). It is at “1” when the lock is active and at “0” when the lock is not active. If Chip
Select (S) continues to be driven low, the same data byte is shifted out. The read cycle is
terminated by driving Chip Select (S) high.
The instruction sequence is shown in
Doc ID 5711 Rev 15
Figure
Table
16.
4) is used to check whether the Identification
M95320-W M95320-R M95320-DF