PCA6408APW,118 NXP Semiconductors, PCA6408APW,118 Datasheet
PCA6408APW,118
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PCA6408APW,118 Summary of contents
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PCA6408A Low-voltage, 8-bit I interrupt output, reset, and configuration registers Rev. 1 — 27 September 2012 1. General description The PCA6408A is an 8-bit general purpose I/O expander that provides remote I/O expansion for most microcontroller families via the I ...
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... NXP Semiconductors The device Port P outputs have 25 mA sink capabilities for directly driving LEDs while consuming low device current. One hardware pin (ADDR) can be used to program and vary the fixed I and allow up to two devices to share the same I 2. Features and benefits ...
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... Topside mark PCA6408ABS P8A PCA6408APW PA6408A PCA6408AHK P8 3.1 Ordering options Table 2. Ordering options Type number Orderable part number PCA6408ABS PCA6408ABSHP PCA6408APW PCA6408APW,118 PCA6408AHK PCA6408AHKX 4. Block diagram ADDR V DD(I2C-bus) V RESET Fig 1. PCA6408A Product data sheet Low-voltage, 8-bit I Package Name Description HVQFN16 plastic thermal enhanced very thin quad flat package; ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning V DD(I2C-bus) ADDR RESET Fig 2. Fig 4. PCA6408A Product data sheet Low-voltage, 8-bit PCA6408APW 002aaf821 Pin configuration for TSSOP16 terminal 1 index area RESET Pin configuration for XQFN16 All information provided in this document is subject to legal disclaimers. Rev. 1 — ...
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... NXP Semiconductors 5.2 Pin description Table 3. Symbol V DD(I2C-bus) ADDR RESET [1] P0 [1] P1 [ [1] P4 [1] P5 [1] P6 [1] P7 INT SCL SDA V DD(P) [1] All I/O are configured as input at power-on. PCA6408A Product data sheet Low-voltage, 8-bit I Pin description Pin TSSOP16 HVQFN16 XQFN16 ...
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... NXP Semiconductors 6. Voltage translation Table C-bus and the PCA6408A. Table 4. V DD(I2C-bus) 1.8 V 1.8 V 1.8 V 1.8 V 2.5 V 2.5 V 2.5 V 2.5 V 3.3 V 3.3 V 3 Functional description Refer to 7.1 Device address The address of the PCA6408A is shown in Fig 5. ADDR is the hardware address package pin and is held to either HIGH (logic 1) or LOW (logic 0) to assign one of the two possible slave addresses ...
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... NXP Semiconductors 7.2 Interface definition Table 5. Byte 2 I C-bus slave address I/O data bus 7.3 Pointer register and command byte Following the successful acknowledgement of the address byte, the bus master sends a command byte, which is stored in the Pointer register in the PCA6408A. Two bits of this data byte state the operation (read or write) and the internal registers (Input, Output, Polarity Inversion, or Configuration) that will be affected ...
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... NXP Semiconductors 7.4 Register descriptions 7.4.1 Input port register (00h) The Input port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by the Configuration register. The Input port register is read only; writes to this register have no effect. The default value ‘X’ ...
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... NXP Semiconductors 7.5 I/O port When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input. The input voltage may be raised above V If the I/O is configured as an output enabled, depending on the state of the Output port register. In this case, there are low-impedance paths between the I/O pin and either V recommended levels for proper operation ...
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... NXP Semiconductors 7.6 Power-on reset When power (from applied to V PCA6408A in a reset condition until V condition is released and the PCA6408A registers and I initialize to their default states. After that, V back up to the operating voltage for a power-reset cycle. See requirements”. 7.7 Reset input (RESET) The RESET input can be asserted to initialize the system while keeping the V operating level ...
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... NXP Semiconductors 8. Bus transactions The PCA6408A PCA6408A through write and read commands using I lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. ...
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... NXP Semiconductors 8.2 Read commands To read data from the PCA6408A, the bus master must first send the PCA6408A address with the least significant bit set to a logic 0 (see command byte is sent after the address and determines which register accessed. After a restart the device address is sent again, but this time the LSB is set to a logic 1. ...
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... NXP Semiconductors 9. Application design-in information V DD(I2C-bus) (1) Resistors are required for inputs (on P port) that may float driver to an input will never let the Fig 12. Typical application 9.1 Minimizing I When the I/Os are used to control LEDs, normally they are connected to V resistor as shown about 1 ...
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... NXP Semiconductors Fig 13. High-value resistor in parallel 9.2 Power-on reset requirements In the event of a glitch or data corruption, PCA6408A can be reset to its default conditions by using the power-on reset feature. Power-on reset requires that the device go through a power cycle to be completely reset. This reset also happens when the device is powered on for the first time in an application ...
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... NXP Semiconductors Table 11. Recommended supply sequencing and ramp rates (unless otherwise noted). Not tested; specified by design. amb Symbol Parameter (dV/dt) fall rate of change of voltage f (dV/dt) rise rate of change of voltage r t reset delay time d(rst) V glitch supply voltage difference DD(gl) t supply voltage glitch pulse width ...
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... NXP Semiconductors 10. Limiting values Table 12. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter C-bus supply voltage DD(I2C-bus) V supply voltage port P DD(P) V input voltage I V output voltage O I input clamping current IK I output clamping current OK I input/output clamping current ...
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... NXP Semiconductors 12. Thermal characteristics Table 14. Thermal characteristics Symbol Parameter Z transient thermal impedance from junction to ambient th(j-a) [1] The package thermal impedance is calculated in accordance with JESD 51-7. 13. Static characteristics Table 15. Static characteristics + amb DD(I2C-bus) Symbol Parameter V input clamping voltage ...
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... NXP Semiconductors Table 15. Static characteristics + amb DD(I2C-bus) Symbol Parameter I input current I I HIGH-level input current P port LOW-level input current IL I supply current DD I additional quiescent DD supply current C input capacitance i C input/output capacitance V io [1] For I , all typical values are at nominal supply voltage (1 ...
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... NXP Semiconductors 13.1 Typical characteristics (μ 5.5 V DD(P) 5 3.3 V 2 −40 − DD(I2C-bus) DD(P) Fig 19. Supply current versus ambient temperature = 25 C T amb DD(I2C-bus) DD(P) Fig 21. Supply current versus supply voltage PCA6408A Product data sheet Low-voltage, 8-bit I 002aag973 ...
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... NXP Semiconductors 35 I sink (mA −40 °C amb 25 ° ° 0 1.65 V DD( sink (mA −40 °C amb 25 ° ° 0 2.5 V DD( sink (mA −40 °C 60 amb 25 °C 85 ° 0 5.0 V DD(P) Fig 22. I/O sink current versus LOW-level output voltage ...
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... NXP Semiconductors 30 I source (mA −40 °C amb 25 ° ° 0 1.65 V DD( source (mA −40 °C amb 25 ° ° 0 2.5 V DD( source T = −40 °C amb (mA) 25 °C 85 ° 0 5.0 V DD(P) Fig 23. I/O source current versus HIGH-level output voltage ...
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... NXP Semiconductors 120 V OL (mV) 100 ( (2) 40 (4) 20 (3) 0 −40 − DD(P) sink ( DD(P) sink ( 1 DD(P) sink ( DD(P) sink Fig 24. LOW-level output voltage versus temperature PCA6408A Product data sheet Low-voltage, 8-bit I 002aah056 V DD(P) 35 ...
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... NXP Semiconductors 14. Dynamic characteristics 2 Table 16. I C-bus interface timing requirements Over recommended operating free air temperature range, unless otherwise specified. See Symbol Parameter f SCL clock frequency SCL t HIGH period of the SCL clock HIGH t LOW period of the SCL clock LOW t pulse width of spikes that must ...
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... NXP Semiconductors Table 18. Switching characteristics Over recommended operating free air temperature range; C Symbol Parameter t valid time on pin INT v(INT) t reset time on pin INT rst(INT) t data output valid time v(Q) t data input set-up time su(D) t data input hold time h(D) 15. Parameter measurement information a. SDA load configuration ...
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... NXP Semiconductors a. Interrupt load configuration START condition slave address SDA SCL INT A t v(INT) A data into ADDRESS port INT t v(INT) Pn View Voltage waveforms C includes probe and jig capacitance. L All inputs are supplied by generators having the following characteristics: PRR 10 MHz; Z All parameters and waveforms are not applicable to all devices ...
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... NXP Semiconductors a. P port load configuration SCL SDA Pn b. Write mode (R SCL Pn c. Read mode (R includes probe and jig capacitance measured from 0.7 v(Q) All inputs are supplied by generators having the following characteristics: PRR 10 MHz; Z The outputs are measured one at a time, with one transition per measurement. ...
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... NXP Semiconductors V DD(I2C-bus) SDA DUT a. SDA load configuration START SCL SDA RESET t rec(rst RESET timing C includes probe and jig capacitance. L All inputs are supplied by generators having the following characteristics: PRR 10 MHz; Z The outputs are measured one at a time, with one transition per measurement. ...
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... NXP Semiconductors 16. Package outline TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors XQFN16: plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2. terminal 1 index area L terminal 1 index area Dimensions (1) Unit max 0.5 0.05 0.25 mm nom 0.127 0.20 min 0.00 0.15 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline ...
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... NXP Semiconductors 17. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 17.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 17.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 33. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. PCA6408A Product data sheet Low-voltage, 8-bit I maximum peak temperature = MSL limit, damage level temperature minimum peak temperature ...
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... NXP Semiconductors 18. Soldering: PCB footprints Footprint information for reflow soldering of HVQFN16 package (0.105 solder land solder paste deposit solder land plus solder paste occupied area Dimensions 0.50 4.00 4.00 2.20 2.20 12-03-07 Issue date 12-03-08 Fig 34. PCB footprint for SOT758-1 (HVQFN16); reflow soldering PCA6408A ...
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... NXP Semiconductors Footprint information for reflow soldering of TSSOP16 package solder land occupied area DIMENSIONS 0.650 0.750 7.200 4.500 1.350 Fig 35. PCB footprint for SOT403-1 (TSSOP16); reflow soldering PCA6408A Product data sheet Low-voltage, 8-bit (4x) P1 Generic footprint pattern ...
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... NXP Semiconductors Footprint information for reflow soldering of XQFN16 package 3.15 1.65 placement area solder land solder paste deposit, −0.02 around copper, stencil thickness 0.1 occupied area Fig 36. PCB footprint for SOT1161-1 (XQFN16); reflow soldering PCA6408A Product data sheet Low-voltage, 8-bit I 2.35 2.1 CU 1.65 0.4 (12×) 0.22 CU (16×) ...
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... NXP Semiconductors 19. Abbreviations Table 21. Acronym ESD FET GPIO 2 I C-bus I/O LED LSB MSB PCB POR SMBus 20. Revision history Table 22. Revision history Document ID Release date PCA6408A v.1 20120927 PCA6408A Product data sheet Low-voltage, 8-bit I Abbreviations Description ElectroStatic Discharge Field-Effect Transistor General Purpose Input/Output ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... PCA6408A Product data sheet Low-voltage, 8-bit I own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. ...
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... NXP Semiconductors 23. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Voltage translation . . . . . . . . . . . . . . . . . . . . . . . 6 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2 Interface definition . . . . . . . . . . . . . . . . . . . . . . 7 7.3 Pointer register and command byte . . . . . . . . . 7 7.4 Register descriptions . . . . . . . . . . . . . . . . . . . . 8 7.4.1 Input port register (00h ...