PCA9538ABSHP NXP Semiconductors, PCA9538ABSHP Datasheet - Page 13

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PCA9538ABSHP

Manufacturer Part Number
PCA9538ABSHP
Description
Interface - I/O Expanders 8bit I2C IO Port
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9538ABSHP

Maximum Operating Frequency
100 kHz
Operating Supply Voltage
1.65 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
HVQFN-16
Operating Current
160 mA
Output Current
25 mA
Power Dissipation
200 mW
Product Type
I/O Expanders
NXP Semiconductors
Table 10.
T
[1]
[2]
PCA9538A
Product data sheet
Symbol
(dV/dt)
(dV/dt)
t
V
t
V
d(rst)
w(gl)VDD
amb
POR(trip)
DD(gl)
Level that V
Glitch width that will not cause a functional disruption when V
= 25
f
r
C (unless otherwise noted). Not tested; specified by design.
Recommended supply sequencing and ramp rates
Parameter
fall rate of change of voltage
rise rate of change of voltage
reset delay time
glitch supply voltage difference
supply voltage glitch pulse width
power-on reset trip voltage
DD
can glitch down to, but not cause a functional disruption when t
8.3 Power-on reset requirements
In the event of a glitch or data corruption, PCA9538A can be reset to its default conditions
by using the power-on reset feature. Power-on reset requires that the device go through a
power cycle to be completely reset. This reset also happens when the device is
powered on for the first time in an application.
The two types of power-on reset are shown in
Table 10
types of power-on reset.
Fig 15. V
Fig 16. V
V
DD
ramp-up
V
(dV/dt)
DD
specifies the performance of the power-on reset feature for PCA9538A for both
DD
DD
r
is lowered below 0.2 V or 0 V and then ramped up to V
is lowered below the POR threshold, then ramped back up to V
V
I
All information provided in this document is subject to legal disclaimers.
drops below POR levels
Rev. 1 — 28 September 2012
Condition
Figure 15
Figure 15
Figure
V
Figure
V
Figure 17
Figure 17
falling V
rising V
DD
DD
Low-voltage 8-bit I
drops to V
drops to V
ramp-down
15; re-ramp time when
16; re-ramp time when
DD
(dV/dt)
DD
DD(gl)
ramp-down
f
= 0.5  V
(dV/dt)
SS
POR(min)
to V
f
when V
time to re-ramp
DD
POR(min)
w(gl)VDD
 50 mV
.
below 0.2 V or to V
Figure 15
t
2
DD
d(rst)
when V
C-bus I/O port with interrupt and reset
time to re-ramp
− 50 mV
drops
< 1 s.
t
d(rst)
DD
drops
and
[1]
[2]
SS
Min
0.1
0.1
1
1
-
-
0.7
-
Figure
ramp-up
(dV/dt)
re-ramp-up
(dV/dt)
DD
PCA9538A
Typ
-
-
-
-
-
-
-
-
16.
r
r
© NXP B.V. 2012. All rights reserved.
DD
Max
2000
2000
-
-
1.0
10
-
1.4
002aah330
time
002aah329
13 of 37
Unit
ms
ms
s
s
V
s
V
V
time

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