MAX9240GTM+ Maxim Integrated, MAX9240GTM+ Datasheet - Page 32

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MAX9240GTM+

Manufacturer Part Number
MAX9240GTM+
Description
Serializers & Deserializers - Serdes 28Bit GMSL Deserializer
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX9240GTM+

Rohs
yes
The serializer/deserializer have a 7-bit-long slave address.
The bit following a 7-bit slave address is the R/W bit, which
is low for a write command and high for a read command.
The slave address is 100100X1 for read commands and
100100X0 for write commands. See
The device resets the bus with the I
for reads. When the R/W bit is set to 1, the serializer/
deserializer transmit data to the master, thus the master
is reading from the device.
A write to the serializer/deserializer comprises the trans-
mission of the slave address with the R/W bit set to zero,
followed by at least one byte of information. The first
byte of information is the register address or command
byte. The register address determines which register of
the device is to be written by the next byte, if received.
If a STOP (P) condition is detected after the register
address is received, the device takes no further action
Figure 25. Slave Address
Figure 26. Format for I
Figure 27. Format for Write to Multiple Registers
Maxim Integrated
S
6.25MHz to 100MHz, 25-Bit GMSL Deserializer for
S = START BIT
P = STOP BIT
A = ACK
D_ = DATA BIT
1
SDA
SCL
0
0
S
ADDRESS = 0x80
MSB
1
0
2
D7
1
C Write
Coax or STP Cable With Line Fault Detect
0
D6
0
REGISTER 0x00 WRITE DATA
0
D5
0
0
ADDRESS = 0x80
0
0 = WRITE
D4
0
0
D3
Figure
0
2
Format for Writing
C START condition
A
0
D2
0
Slave Address
25.
D1
0
0
0 = WRITE
Bus Reset
D0
0
0
1
REGISTER ADDRESS = 0x00
0
A
A
0
D7
0
0
0
D6
0
REGISTER ADDRESS = 0x0000
beyond storing the register address
bytes received after the register address are data bytes.
The first data byte goes into the register selected by the
register address, and subsequent data bytes go into
subsequent registers
are transmitted before a STOP condition, these bytes
are stored in subsequent registers because the register
addresses autoincrement.
The serializer/deserializer are read using the internally
stored register address as an address pointer, the same
way the stored register address is used as an address
pointer for a write. The pointer autoincrements after each
data byte is read using the same rules as for a write. Thus,
a read is initiated by first configuring the register address
by performing a write
read consecutive bytes from the device, with the first data
byte being read from the register address pointed by
the previously written register address. Once the master
sends a NACK, the device stops sending valid data.
REGISTER 0x02 WRITE DATA
0
D5
0
0
D4
0
0
0
D3
0
A
D2
0
D7
D1
0
1/0
D6
D0
0
(Figure
(Figure
REGISTER 0x00 WRITE DATA
D5
N
A
R/W
LSB
D4
P
27). If multiple data bytes
28). The master can now
D3
S = START BIT
P = STOP BIT
A = ACK
N = NACK
D_ = DATA BIT
MAX9240
Format for Reading
D2
ACK
(Figure
D1
D0
26). Any
A
P
32

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