73S1217F-68MR/F/PE Maxim Integrated, 73S1217F-68MR/F/PE Datasheet - Page 108
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73S1217F-68MR/F/PE
Manufacturer Part Number
73S1217F-68MR/F/PE
Description
8-bit Microcontrollers - MCU
Manufacturer
Maxim Integrated
Datasheet
1.73S1217F-68MRFPE.pdf
(140 pages)
Specifications of 73S1217F-68MR/F/PE
Rohs
yes
Core
80515
Data Bus Width
8 bit
Part # Aliases
90-W1217+TF5
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CRC MS Value Registers (CRCMsB): 0xFE14
The 16-bit CRC value forms the TX CRC word in TX mode (write value) and the RX CRC in RX mode
(read value). The initial value of CRC to be used when generating a CRC to be transmitted at the end of
a message (after the last TX byte is sent) when enabled in T=1 mode. Should be reloaded at the
beginning of every message to be transmitted. When using CRC, both CRC registers should be
initialized to FF. When using LRC the CRCLsB Value register should be loaded to 00. When receiving a
message, the firmware should load this with the initial value and then read this register to get the final
value at the end of the message. These registers need to be reloaded for each new message to be
received. When in LRC mode, bits (7:0) are used and bits (15:8) are undefined. During LRC/CRC
checking and generation, this register is updated with the current value and can be read to aid in
debugging. This information will be transmitted to the smart card using the timing specified by the Guard
Time register. When checking CRC/LRC on an incoming message (CRC/LRC is checked against the
data and CRC/LRC), the firmware reads the final value after the message has been received and
determines if an error occurred (= 0x1D0F (CRC) no error, else error; = 0 (LRC) no error, else error).
When a message is received, the CRC/LRC is stored in the FIFO. The polynomial used to generate and
check CRC is x
into indirect convention. When in indirect convention, the CRC is checked after the conversion out of
indirect convention. For a given message, the CRC generated (and readable from this register) will be
the same whether indirect or direct convention is used to transmit the data to the smart card. The
CRCLsB / CRCMsB registers will be updated with CRC/LRC whenever bits are being received or
transmitted from/to the smart card (even if CRCEN is not set and in mode T1). They are available to the
firmware to use if desired.
108
MSB
MSB
CRC.15
CRC.7
16
+ x
12
CRC.14
+ x
CRC.6
5
+1. When in indirect convention, the CRC is generated prior to the conversion
CRC.13
CRC.5
Table 100: The CRCMsB Register
Table 101: The CRCLsB Register
CRC.12
CRC.4
0xFF, (CRCLsB): 0xFE15
CRC.11
CRC.3
CRC.10
CRC.2
CRC.9
CRC.1
0xFF
CRC.8
CRC.0
LSB
LSB
Rev. 1.2
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