C8051F996-GUR Silicon Labs, C8051F996-GUR Datasheet - Page 207

• Manufacturer Part Number: C8051F996-GUR
• Description: 8-bit Microcontrollers - MCU 8kB ADC 14-CH CDC
• Manufacturer: Silicon Labs

Specifications of C8051F996-GUR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

20.3.2. Setting a SmaRTClock Alarm
The SmaRTClock alarm function compares the 32-bit value of SmaRTClock Timer to the value of the
ALARMn registers. An alarm event is triggered if the SmaRTClock timer is equal to the ALARMn registers.
If Auto Reset is enabled, the 32-bit timer will be cleared to zero one SmaRTClock cycle after the alarm
event.
The SmaRTClock alarm event can be configured to reset the MCU, wake it up from a low power mode, or
generate an interrupt. See Section “13. Interrupt Handler” on page 137, Section “15. Power Management”
on page 161, and Section “18. Reset Sources” on page 179 for more information.
The following steps can be used to set up a SmaRTClock Alarm:
1. Disable SmaRTClock Alarm Events (RTC0AEN = 0).
2. Set the ALARMn registers to the desired value.
3. Enable SmaRTClock Alarm Events (RTC0AEN = 1).
Notes:
1. The ALRM bit, which is used as the SmaRTClock Alarm Event flag, is cleared by disabling SmaRTClock Alarm
2. If AutoReset is disabled, disabling (RTC0AEN = 0) then Re-enabling Alarm Events (RTC0AEN = 1) after a
3. The SmaRTClock Alarm Event flag will remain asserted for a maximum of one SmaRTClock cycle. See Section
Events (RTC0AEN = 0).
SmaRTClock Alarm without modifying ALARMn registers will automatically schedule the next alarm after 2^32
SmaRTClock cycles (approximately 36 hours using a 32.768 kHz crystal).
“15. Power Management” on page 161 for information on how to capture a SmaRTClock Alarm event using a
flag which is not automatically cleared by hardware.
Rev. 1.1
C8051F99x-C8051F98x
207