74LVCH16244AEV/G NXP Semiconductors, 74LVCH16244AEV/G Datasheet
74LVCH16244AEV/G
Specifications of 74LVCH16244AEV/G
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74LVCH16244AEV/G Summary of contents
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... V input/output tolerant; 3-state Rev. 12 — 5 March 2012 1. General description The 74LVC16244A; 74LVCH16244A are 16-bit non-inverting buffer/line drivers with 3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each controlling four of the 3-state outputs ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Temperature range Package 40 C to +125 C 74LVC16244ADL 74LVCH16244ADL 40 C to +125 C 74LVC16244ADGG 74LVCH16244ADGG 40 C to +125 C 74LVC16244AEV 74LVCH16244AEV 40 C to +125 C 74LVC16244ABX 74LVCH16244ABX 4. Functional diagram 1A0 1Y0 47 2 1A1 ...
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... NXP Semiconductors Fig 3. Bus hold circuit 5. Pinning information 5.1 Pinning 1OE 1 2 1Y0 3 1Y1 GND 4 1Y2 5 1Y3 2Y0 2Y1 9 GND 10 2Y2 11 2Y3 12 74LVC16244A 13 3Y0 74LVCH16244A 3Y1 14 GND 15 3Y2 16 3Y3 4Y0 19 4Y1 20 GND 21 4Y2 22 23 4Y3 4OE 24 Fig 4. Pin configuration SOT370-1 (SSOP48) and ...
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... NXP Semiconductors terminal 1 index area (1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad however soldered the solder land should remain floating or be connected to GND. Fig 6. Pin configuration SOT1134-2 (HXQFN60) ...
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... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin SOT370-1 and SOT362-1 1OE, 2OE, 1, 48, 25, 24 3OE, 4OE 1Y0 to 1Y3 2Y0 to 2Y3 8, 9, 11, 12 3Y0 to 3Y3 13, 14, 16, 17 4Y0 to 4Y3 19, 20, 22, 23 GND 4, 10, 15, 21, 28, 34, 39 18, 31, 42 ...
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... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage HIGH-level output voltage ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I bus hold HIGH V BHH CC [3][4] current bus hold LOW V BHLO CC overdrive current V CC [3][ bus hold HIGH V BHHO CC overdrive current V CC [3][ [1] All typical values are measured at V ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions C power per input dissipation V CC capacitance [ the same as t and PLH PHL t is the same as t and ...
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... NXP Semiconductors nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 8. 3-state enable and disable times. Table 8. Measurement points Supply voltage 0.5 V 1.2 V 0.5 1.95 V 0.5 ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 9. Test circuit for measuring switching times Table 9 ...
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... NXP Semiconductors 12. Package outline SSOP48: plastic shrink small outline package; 48 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm 2.8 0.25 0.2 2.20 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION ...
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... NXP Semiconductors TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4 0.65 mm ball A1 index area ball A1 1 index area DIMENSIONS (mm are the original dimensions) A UNIT max. 0.3 0.7 0. 0.2 0.6 0.35 OUTLINE VERSION IEC SOT702-1 Fig 12 ...
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... NXP Semiconductors HXQFN60: plastic compatible thermal enhanced extremely thin quad flat package; no leads; 60 terminals; body 0.5 mm terminal 1 index area A10 terminal 1 index area Dimensions Unit max ...
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... NXP Semiconductors 13. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date 74LVC_LVCH16244A v.12 20120305 • ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 13 Abbreviations ...