74AUP2G126GN,115 NXP Semiconductors, 74AUP2G126GN,115 Datasheet
74AUP2G126GN,115
Specifications of 74AUP2G126GN,115
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74AUP2G126GN,115 Summary of contents
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Low-power dual buffer/line driver; 3-state Rev. 9 — 11 February 2013 1. General description The 74AUP2G126 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A LOW level ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C 74AUP2G126DC 40 C to +125 C 74AUP2G126GT 40 C to +125 C 74AUP2G126GF 40 C to +125 C 74AUP2G126GD 40 C to +125 C 74AUP2G126GM 40 C to +125 C 74AUP2G126GN ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP2G126 1OE GND 001aae997 Fig 3. Pin configuration SOT765-1 74AUP2G126 1OE GND 4 Transparent top view Fig 5. Pin configuration SOT996-2 6.2 Pin description Table 3. Pin description Symbol Pin SOT765-1, SOT833-1, SOT1089, SOT996-2, SOT1116 and SOT1203 ...
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... NXP Semiconductors 7. Functional description [1] Table 4. Function table Input nOE [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 25 C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I OFF-state output current ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I additional supply current CC C input capacitance I C output capacitance O = 40 C to +85 C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I additional power-off OFF leakage current I supply current CC I additional supply current CC = 40 C to +125 C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage ...
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... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I additional power-off OFF leakage current I supply current CC I additional supply current CC 0.6 V, other input at V [1] One input [2] To show I remains very low when the input-disable feature is enabled. ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions propagation delay nA to nY; see pd t enable time nOE to nY; see en t disable time nOE to nY; see dis propagation delay nA to nY; see ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t disable time nOE to nY; see dis propagation delay nA to nY; see pd t enable time nOE to nY; see en t disable time nOE to nY; see ...
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... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions pF and power dissipation output enabled capacitance V I [1] All typical values are measured at nominal V [ the same as t and t ...
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... NXP Semiconductors nOE input output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Logic levels: V and Fig 8. Enable and disable times Table 10. Measurement points Supply voltage Input 0.5 1.6 V 0.5 2.7 V 0.5 ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 9. Test circuit for measuring switching times Table 11 ...
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... NXP Semiconductors 13. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2 pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0. 0.12 0.00 0.60 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. ...
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... NXP Semiconductors XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1. 8× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 2.0 mm 0.5 0.04 0.17 1.9 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1. 0.5 mm terminal 1 index area (2) (4× terminal 1 index area Dimensions (1) Unit max 0.5 0.04 0.20 1.40 mm nom 0.15 1.35 min 0.12 1.30 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version ...
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... NXP Semiconductors XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 0.5 mm terminal 1 index area Dimensions (mm are the original dimensions) (1) Unit max 0.05 0.35 2.1 mm nom 0.5 min 0.00 0.15 1.9 Outline version IEC SOT996-2 Fig 13. Package outline SOT996-2 (XSON8) 74AUP2G126 Product data sheet ...
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... NXP Semiconductors XQFN8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1 terminal 1 index area terminal 1 index area L 1 Dimensions (1) Unit max 0.5 0.05 0.25 1.65 mm nom 0.20 1.60 min 0.00 0.15 1.55 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. Outline ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1 (2) (8×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.25 mm nom 0.15 1.20 min 0.12 1.15 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version IEC SOT1116 Fig 15. Package outline SOT1116 (XSON8) ...
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... NXP Semiconductors XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 (2) (8×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.40 mm nom 0.15 1.35 min 0.12 1.30 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version IEC SOT1203 Fig 16. Package outline SOT1203 (XSON8) ...
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... NXP Semiconductors 14. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 13. Revision history Document ID Release date 74AUP2G126 v.9 20130211 • ...
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... Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... Product data sheet NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 13 Package outline ...