DS26528GA4 Maxim Integrated, DS26528GA4 Datasheet - Page 204

• Manufacturer Part Number: DS26528GA4
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26528GA4

• Part # Aliases: 90-26528-GA4

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 6 and 5: IBO Bus Size (IBS[1:0]). Indicates how many devices are on the bus.
Bit 4: Interleave Bus Operation Select (IBOSEL). This bit selects channel or frame interleave mode.
Bit 3: Interleave Bus Operation Enable (IBOEN).
Bits 2 to 0: Device Assignment Bits (DA[2:0]).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 4 to 0: Transmit Channel Monitor Bits (TCM[4:0]). TCM0 is the LSB of a 5-bit channel select that
determines which transmit channel data will appear in the
5-bit BCD code from 0 to 31. TCM[4:0] = all zeros selects channel 1, TCM[4:0] = 11111 selects channel 32.
DA2
IBS1
0
0
0
0
1
1
1
1
0
0
1
1
0 = Channel Interleave
1 = Frame Interleave
0 = Interleave Bus Operation disabled
1 = Interleave Bus Operation enabled
DA1
0
0
1
1
0
0
1
1
IBS0
0
1
0
1
—
—
7
0
7
0
DA0
0
1
0
1
0
1
0
1
TIBOC
Transmit Interleave Bus Operation Control Register
188h + (200h x n): where n = 0 to 7, for Ports 1 to 8
TDS0SEL
Transmit DS0 Channel Monitor Select Register
189h + (200h x n): where n = 0 to 7, for Ports 1 to 8
Reserved for future use
IBS1
—
6
0
6
0
2 devices on bus
4 devices on bus
8 devices on bus
DEVICE POSITION
2nd device on bus
3rd device on bus
1st device on bus
4th device on bus
5th device on bus
6th device on bus
7th device on bus
8th device on bus
BUS SIZE
IBS0
—
5
0
5
0
IBOSEL
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TCM4
4
0
4
0
TDS0M
IBOEN
TCM3
register. Channels 1 to 32 are represented by a
3
0
3
0
DS26528 Octal T1/E1/J1 Transceiver
TCM2
DA2
2
0
2
0
TCM1
DA1
1
0
1
0
TCM0
DA0
0
0
0
0