DS32506NW Maxim Integrated, DS32506NW Datasheet - Page 67

• Manufacturer Part Number: DS32506NW
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS32506NW

• Part # Aliases: 90-32506-NW0

Bit 3: Line Decoder Status Register Interrupt Status (LDSR). This bit is set when any of the latched status
register bits in the B3ZS/HDB3 Line Decoder block are set and enabled for interrupt. When set, this bit causes an
interrupt if PORT.ISRIE:LDSRIE and GLOBAL.ISRIE:PnISRIE are both set. See Section 8.10.
Bit 2: LIU Status Register Interrupt Status (LIUSR). This bit is set when any of the latched status register bits in
the LIU block are set and enabled for interrupt. When set, this bit causes an interrupt if PORT.ISRIE:LIUSRIE and
GLOBAL.ISRIE: PnISRIE are both set. See Section 8.10.
Bit 1: BERT Status Register Interrupt Status (BSR). This bit is set when any of the latched status register bits in
the BERT block are set and enabled for interrupt. When set, this bit causes an interrupt if PORT.ISRIE:BSRIE and
GLOBAL.ISRIE: PnISRIE are both set. See Section 8.10.
Bit 0: Port Status Register Interrupt Status (PSR). This bit is set when any of the latched status register bits in
the port latched status register (PORT.SRL) are set and enabled for interrupt. When set, this bit causes an interrupt
if PORT.ISRIE:PSRIE and GLOBAL.ISRIE: PnISRIE are both set. See Section 8.10.
Bit 3: Line Decoder Status Register Interrupt Enable (LDSRIE). This bit is the interrupt enable for the
PORT.ISR:LDSR status bit.
Bit 2: LIU Status Register Interrupt Enable (LIUSRIE). This bit is the interrupt enable for the PORT.ISR:LIUSR
status bit.
Bit 1: BERT Status Register Interrupt Enable (BSRIE). This bit is the interrupt enable for the PORT.ISR:BSR
status bit.
Bit 0: Port Status Register Interrupt Enable (PSRIE). This bit is the interrupt enable for the PORT.ISR:PSR
status bit.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
0 = mask the interrupt
1 = enable the interrupt
0 = mask the interrupt
1 = enable the interrupt
0 = mask the interrupt
1 = enable the interrupt
0 = mask the interrupt
1 = enable the interrupt
15
15
—
—
—
—
7
0
7
0
14
14
—
—
—
—
0
0
6
6
PORT.ISR
Port Interrupt Status Register
n * 80h + 10h
PORT.ISRIE
Port Interrupt Status Register Interrupt Enable
n * 80h + 14h
13
13
—
—
—
—
5
0
5
0
67 of 130
12
12
—
—
—
—
4
0
4
0
LDSRIE
LDSR
11
11
—
—
3
0
3
0
LIUSRIE
LIUSR
10
10
—
—
2
0
2
0
DS32506/DS32508/DS32512
BSRIE
BSR
—
—
9
1
9
0
1
0
PSRIE
PSR
—
—
8
0
8
0
0
0