89H48H12G3YCHLG IDT, 89H48H12G3YCHLG Datasheet - Page 8

• Manufacturer Part Number: 89H48H12G3YCHLG
• Description: Peripheral Drivers & Components - PCIs
• Manufacturer: IDT

Specifications of 89H48H12G3YCHLG

• Rohs: yes

IDT 89HPES48H12G2 Data Sheet
P1213MERGEN
CLKMODE[2:0]
P01MERGEN
P23MERGEN
P45MERGEN
P67MERGEN
P89MERGEN
GCLKFSEL
Signal
Type
I
I
I
I
I
I
I
Clock Mode. These signals determine the port clocking mode used by
ports of the device.
Global Clock Frequency Select. These signals select the frequency of
the GCLKP and GCLKN signals.
0x0 100 MHz
0x1 125 MHz
Port 0 and 1 Merge. P01MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 0 is merged with port 1 to form a single
x8 port. The Serdes lanes associated with port 1 become lanes 4 through 7
of port 0. When this pin is high, port 0 and port 1 are not merged, and each
operates as a single x4 port.
Port 2 and 3 Merge. P23MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 2 is merged with port 3 to form a single
x8 port. The Serdes lanes associated with port 3 become lanes 4 through 7
of port 2. When this pin is high, port 2 and port 3 are not merged, and each
operates as a single x4 port.
Port 4 and 5 Merge. P45MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 4 is merged with port 5 to form a single
x8 port. The Serdes lanes associated with port 5 become lanes 4 through 7
of port 4. When this pin is high, port 4 and port 5 are not merged, and each
operates as a single x4 port.
Port 6 and 7 Merge. P67MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 6 is merged with port 7 to form a single
x8 port. The Serdes lanes associated with port 7 become lanes 4 through 7
of port 6. When this pin is high, port 6 and port 7 are not merged, and each
operates as a single x4 port.
Port 8 and 9 Merge. P89MERGEN is an active low signal. It is pulled low
internally. When this pin is low, port 8 is merged with port 9 to form a single
x8 port. The Serdes lanes associated with port 9 become lanes 4 through 7
of port 8. When this pin is high, port 8 and port 9 are not merged, and each
operates as a single x4 port.
Port 12 and 13 Merge. P1213MERGEN is an active low signal. It is pulled
low internally. When this pin is low, port 12 is merged with port 13 to form a
single x8 port. The Serdes lanes associated with port 13 become lanes 4
through 7 of port 12. When this pin is high, port 12 and port 13 are not
merged, and each operates as a single x4 port.
Table 5 System Pins (Part 1 of 2)
8 of 44
Name/Description
November 28, 2011