ISL1902FAZ-T7A Intersil, ISL1902FAZ-T7A Datasheet - Page 19

• Manufacturer Part Number: ISL1902FAZ-T7A
• Description: LED Lighting Drivers Dimmable AC Mains LED Driver PFC
• Manufacturer: Intersil

Specifications of ISL1902FAZ-T7A

• Rohs: yes
• Input Voltage: 4 V
• Operating Frequency: 320 Hz
• Maximum Supply Current: 14.5 mA
• Output Current: 1 A
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-24
• Minimum Operating Temperature: - 40 C

Current Sensing
The ISL1902 is configured to regulate the output current by
differentially monitoring the output switching current using the
CS+ and CS- pins. The output switching current waveform is
amplified 4x and output on IOUT where it must be scaled and
filtered before being input to the control loop at the FB pin. The
required filter time constant depends on the compensated error
amplifier bandwidth. The filter bandwidth must be higher than
the control loop bandwidth, typically an order of magnitude
higher, but it is generally not necessary to filter the IOUT signal to
form a nearly DC voltage. The compensated error amplifier
performs that function.
The OC pin provides cycle-by-cycle overcurrent protection. The
output FET drive signal OUT is terminated if OC exceeds 0.6V
nominal. There is ~120ns of leading edge blanking (LEB) on OC
to minimize or eliminate external filtering.
Dimming
The ISL1902 supports both PWM and DC current modulation
dimming. DC current dimming is the lower cost method, but
results in a non-linear dimming characteristic due to the
increasing efficacy of the LEDs as current is reduced. PWM
dimming results in linear dimming behavior.
An external FET, controlled by PWMOUT, switches the LED current
on and off to achieve PWM dimming.
FIGURE 22. ALTERNATE METHOD FOR USING PWM INPUT CONTROL
FIGURE 23. TEMPERATURE COMPENSATING THE REFERENCE USING
10
11
12
3
4
5
6
8
9
REFIN
LPOUT
VREF
WITH AN AMBIENT LIGHT SENSOR
10
11
12
AN NTC
3
4
5
6
8
9
ISL1902
REFIN
LPOUT
VREF
ISL1902
LOUT
LREF
LFB
AC
LOUT
LREF
LFB
20
19
18
17
16
15
14
13
AC
20
19
18
17
16
15
14
13
19
PWM CONTROL
100/120Hz
NTC
R
ALS
ISL1902
In either case, the control loop determines the average current
delivered to the load. It does not matter if the load current is DC
or pulsed, the converter output capacitance and control loop
operate to filter and average the converter output current
independently of the actual load current waveform.
The dimming PWM and control loop are linked together such that
the PWM duty cycle tracks the main control loop reference
setpoint. If the control loop is set for 50% load, for example, the
dimming PWM duty cycle is set for 50%. The LED current will be
at 100% load for 50% of the time and 0% load for 50% of the
time, which averages to the 50% average load setpoint. See
Figure 6 for a graphical representation of the relationship
between REFIN and PWMOUT duty cycle. It should be noted that
the PWMOUT duty cycle is not allowed to go to zero. There is a
minimum on-time that ensures the LED string is not allowed to
become a continuos open circuit.
Aside from tracking the main control loop reference, the PWM
dimming control is open loop, but is nevertheless self regulating.
There is no closed loop feedback to regulate the load current
during PWM conduction as is the case with most PWM dimming
methods. If the average current into and out of the output
capacitor is not equal, the output voltage will change, increasing
or decreasing with the polarity of the charge imbalance. The
forward voltage characteristic of the LEDs will cause the current
to increase or decrease with the change in output voltage until
the average capacitor current returns to zero. Figures 24 and 25
show a simulation schematic and results, respectively,
illustrating the PWM dimming behavior for a 50% loaded
condition. The converter output is idealized and represented as a
50mA DC current source and the PWM is operating at 50% duty
cycle.
11.86
11.84
11.82
11.80
11.78
11.76
11.74
11.72
11.70
11.68
FIGURE 24. PWM DIMMING SIMULATION SCHEMATIC
Y2
100
80
60
40
20
-0
Y1
500
TIME/ms
FIGURE 25. PWM DIMMING RESULTS
PWM LOAD CURRENT
501
C
O U T
502
CONVERTER I
503
V
P W M D U T Y C Y C L E
O
OUT
504
505
March 20, 2013
1ms/DIV
FN7981.2
506