MCIMX503CVK8B Freescale Semiconductor, MCIMX503CVK8B Datasheet - Page 134

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MCIMX503CVK8B

Manufacturer Part Number
MCIMX503CVK8B
Description
Processors - Application Specialized CODEX 13MM REV 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX503CVK8B

Core
ARM Cortex A8
Processor Series
i.MX50
Data Bus Width
32 bit
Operating Supply Voltage
0.75 V to 1.275 V
Memory Type
L1/L2 Cache, ROM, SRAM

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX503CVK8BR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Revision History
134
Number
Rev. 1
Rev. 0
Rev.
10/2011 •
07/2011 Initial release.
Date
Table 85. i.MX50 Data Sheet Document Revision History (continued)
Table 5, "Special Signal Considerations," on page 17
Table 5, "Special Signal Considerations," on page 17
maximum current leakage at this pin is 8.5 μA.”
Table 5, "Special Signal Considerations," on page 17
to “pull-up, by default” and added “If JTAG port is not needed, the internal pull-up can be disabled in order
to reduce supply current to the pin.”
Table 14, "Maximum Supply Current Consumption," on page 27
changed VDDO2P5 to VDDO25.
Table 77, "VBUS Comparators Thresholds," on page 100
Table 5, "Special Signal Considerations," on page 17
was changed to N24 and DRAM_SDCLK_0_B pin number was changed to M24.
Table 5, "Special Signal Considerations," on page 17
was changed to T20 and DRAM_SDCLK_1_B pin number was changed to R20.
Table 5, "Special Signal Considerations," on page 17
changed to P23 and DRAM_SDQS0_B pin number was changed to P24.
Table 5, "Special Signal Considerations," on page 17
DRAMCALIB.
Table 5, "Special Signal Considerations," on page 17
DRAM_SDCLK_0_B, DRAM_SDCLK_1, DRAM_SDCLK_1_B, DRAM_SDQS0, DRAM_SDQS0_B,
DRAM_SDQS1, DRAM_SDQS1_B, DRAM_SDQS2, DRAM_SDQS2_B, DRAM_SDQS3, and
DRAM_SDQS3_B to DRAMCLK.
i.MX50 Applications Processors for Consumer Products, Rev. 4
Substantive Change(s)
for 416 MAPBGA, DRAM_SDQS0 pin number was
changed pad type of pin DRAM_CALIBRATION to
in the CHGR_DET_B signal remarks, added “The
changed CHRG_DET_B to CHGR_DET_B.
in the JTAG_MOD remarks, changed “pull-down”
for 416 MAPBGA, DRAM_SDCLK_0 pin number
for 416 MAPBGA, DRAM_SDCLK_1 pin number
changed pad type of pins DRAM_SDCLK_0,
changed CHRG_DET_B to CHGR_DET_B.
in the 11
th
row under the Supply column,
Freescale Semiconductor

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