MCIMX503CVK8B Freescale Semiconductor, MCIMX503CVK8B Datasheet - Page 16

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MCIMX503CVK8B

Manufacturer Part Number
MCIMX503CVK8B
Description
Processors - Application Specialized CODEX 13MM REV 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX503CVK8B

Core
ARM Cortex A8
Processor Series
i.MX50
Data Bus Width
32 bit
Operating Supply Voltage
0.75 V to 1.275 V
Memory Type
L1/L2 Cache, ROM, SRAM

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Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX503CVK8BR2
Manufacturer:
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Quantity:
10 000
Modules List
16
Temperature
Mnemonic
USB-OH-1
XTALOSC
WDOG-1
UART-1
UART-2
UART-3
UART-4
UART-5
Monitor
Block
SSI-1
SSI-2
I2S/SSI/AC97
Interface
UART Interface,
ver. 2
USB 2.0
High-Speed
OTG-capable
and Host ports
Watch Dog
Crystal
Oscillator I/F
Temp Sensor
Block Name
i.MX50 Applications Processors for Consumer Products, Rev. 4
Table 4. i.MX50 Digital and Analog Modules (continued)
Slave
Connectivity
Peripherals
Analog
Slave
Connectivity
Peripherals
Master
Connectivity
Peripherals
Timer
Peripherals
Clocking
Subsystem
The SSI is a full-duplex synchronous interface used on the i.MX50 processor
to provide connectivity with off-chip audio peripherals. The SSI interfaces
connect internally to the AUDMUX for mapping to external ports. The SSI
supports a wide variety of protocols (SSI normal, SSI network, I2S, and
AC-97), bit depths (up to 24 bits per word), and clock/frame sync options.
Each SSI has two pairs of 8 x 24 FIFOs and hardware support for an external
DMA controller in order to minimize its impact on system performance. The
second pair of FIFOs provides hardware interleaving of a second audio
stream, which reduces CPU overhead in use cases where two time slots are
being used simultaneously.
The temperature sensor is an internal module to the i.MX50 that monitors the
die temperature.
Each of the UARTv2 modules supports the following serial data
transmit/receive protocols and configurations:
USB-OH-1 supports USB2.0 HS/FS/LS, and contains:
The Watchdog (WDOG) timer module protects against system failures by
providing a method of escaping from unexpected events or programming
errors. The WDOG Timer supports two comparison points during each
counting period. Each of the comparison points is configurable to invoke an
interrupt to the ARM core, and a second point invokes an external event on
the WDOG line.
The XTALOSC module combined with an external 24 MHz crystal with load
capacitors implements a crystal oscillator.
• 7 or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd, or
• Programmable bit-rates up to 4 Mbps. This is a higher max baud rate
• 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud
• IrDA 1.0 support (up to SIR speed of 115200 bps)
• One high-speed OTG-capable module with integrated HS USB PHY
• One high-speed Host module with integrated HS USB PHY
none)
relative to the 1.875 Mbps, which is specified by the TIA/EIA-232-F
standard.
Brief Description
Freescale Semiconductor

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