MCIMX503CVK8B Freescale Semiconductor, MCIMX503CVK8B Datasheet - Page 9

• Manufacturer Part Number: MCIMX503CVK8B
• Description: Processors - Application Specialized CODEX 13MM REV 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX503CVK8B

• Core: ARM Cortex A8
• Processor Series: i.MX50
• Data Bus Width: 32 bit
• Operating Supply Voltage: 0.75 V to 1.275 V
• Memory Type: L1/L2 Cache, ROM, SRAM

Freescale Semiconductor
400 MAPBGA 17 x 17 mm,
416 PoPBGA 13 x 13 mm,
Package
0.5 mm pitch
0.8 mm pitch
Dimensions
i.MX50 Applications Processors for Consumer Products, Rev. 4
Table 3. Package Feature Comparison (continued)
Deleted Pins:
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
DRAM_A14
DRAM_CAS
DRAM_OPEN
DRAM_OPENFB
DRAM_RAS
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_SDCLK_1
DRAM_SDCLK_1_B
DRAM_SDODT0
DRAM_SDODT1
DRAM_SDWE
DRAM_OPEN
DRAM_OPENFB
Added Pins:
POP_EMMC_RST
POP_LPDDR2_ZQ0
POP_LPDDR2_ZQ1
POP_LPDDR2_1.8V
POP_NAND_VCC
Deleted Pins:
DRAM_SDCLK_1
DRAM_SDCLK_1_B
DRAM_A14
DRAM_SDODT1
UART2_CTS
UART2_RTS
Versus 416 MAPBGA
I/O Pin Differences
• The i.MX50 PoPBGA package supports 168-FBGA
• i.MX50 PoPBGA was designed to accommodate a
• The NVCC_EMI_DRAM power pins supply 1.2 V power to
• Additional PoP package pin descriptions may be found in
• On the PoPBGA package, the DRAM Address, Data, and
• USB_OTG_VDDA25 and USB_H1_VDDA25 are shorted
• USB_OTG_VDDA33 and USB_H1_VDDA33 are shorted
• USB_OTG_VDDA25 and USB_H1_VDDA25 are
• USB_OTG_VDDA33 and USB_H1_VDDA33 are
LPDDR2 DRAM memory only. It is not possible to support
LPDDR1 or DDR2 on the i.MX50 PoPBGA.
combined LPDDR2 / eMMC PoP memory. The PoP eMMC
device uses the SD3_DATA[7:0], SD3_CLK, and
SD3_CMD pins. Because the PoP eMMC I/O and memory
supplies are tied together on the substrate, 1.8 V eMMC
I/O operation is not supported for the PoP eMMC device.
POP_NAND_VCC and NVCC_NANDF must use a 3 V
supply.
the i.MX50 DRAM controller as well as the PoP LPDDR2
DRAM.
the Special Signals Considerations section
clock pins are routed to the bottom balls for Freescale test
purposes only. It is recommended that these bottom
DRAM pins are left unconnected on the customer PCB.
together on the 416 PoPBGA package substrate.
together on the 416 PoPBGA package substrate.
independent and NOT shorted together on the 400
MAPBGA package substrate.
independent and NOT shorted together on the 400
MAPBGA package substrate.
Notes on Package Differences
(Table
Introduction
5).
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