IS62C1024AL-35TLI ISSI, Integrated Silicon Solution Inc, IS62C1024AL-35TLI Datasheet - Page 6

• Manufacturer Part Number: IS62C1024AL-35TLI
• Description: IC SRAM 1MBIT 35NS 32TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: Asynchronousr

Specifications of IS62C1024AL-35TLI

• Memory Size: 1M (128K x 8)
• Package / Case: 32-TSOP
• Interface: Parallel
• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Speed: 35ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 35 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 30 mA
• Organization: 128 K x 8
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 1
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 706-1042

IS62C1024AL
IS65C1024AL
READ CYCLE NO. 2
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE1 = V
3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6 to 2.4V
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
4. Tested with OE HIGH.
6
Symbol
t
t
t
t
t
t
t
t
t
t
t
and output loading specified in Figure 1a.
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
wc
sce
sce
aw
ha
sa
Pwe
sD
hD
hzwe
lzwe
ADDRESS
1
2
(4)
(2)
(2)
DOUT
CE1
CE2
OE
Parameter
Write Cycle Time
CE1 to Write End
CE2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
(1,3)
t
ACE1/
t
t
HIGH-Z
LZCE1/
LZCE2
t
ACE2
t
AA
Il
Integrated Silicon Solution, Inc. — www.issi.com —
, CE2 = V
t
LZOE
t
DOE
t
RC
Ih
.
(1,3)
Min.
35
25
25
25
25
20
—
0
0
0
3
-35 ns
(Over Operating Range, Standard and Low Power)
Max.
10
—
—
—
—
—
—
—
—
—
—
DATA VALID
Min.
t
-45 ns
45
35
35
35
35
25
—
HZCE
0
0
0
5
t
HZOE
Max.
15
t
—
—
—
—
—
—
—
—
—
—
OHA
1-800-379-4774
Unit
ns
ns
ns
ns
ns
ns
ns
ns
n s
ns
ns
06/26/08
Rev. H