MT46H32M16LFBF-5:B TR Micron Technology Inc, MT46H32M16LFBF-5:B TR Datasheet - Page 49

• Manufacturer Part Number: MT46H32M16LFBF-5:B TR
• Description: IC DDR SDRAM 512MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H32M16LFBF-5:B TR

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-VFBGA
• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 6.5/5ns
• Maximum Clock Rate: 200MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 115mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1382-2

Figure 16: Initialize and Load Mode Registers
PDF: 09005aef82d5d305
512mb_ddr_mobile_sdram_t47m.pdf – Rev. I 12/09 EN
Command
BA0, BA1
Address
V
DQS
V
DDQ
CK#
CKE
A10
DM
DQ
CK
DD
1
LVCMOS
HIGH LEVEL
Power-up: V
Notes:
NOP 2
T = 200µs
(
(
(
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
)
)
)
)
)
)
)
)
)
)
)
(
(
(
(
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
)
)
)
)
)
)
)
)
)
)
)
DD
1. PRE = PRECHARGE command; LMR = LOAD MODE REGISTER command; AR = AUTO RE-
2. NOP or DESELECT commands are required for at least 200μs.
3. Other valid commands are possible.
4. NOPs or DESELECTs are required during this time.
and CK stable
t
IS
FRESH command; ACT = ACTIVE command.
NOP
T0
High-Z
High-Z
t
IH
t
CH
t
CK
t
CL
All banks
t
IS
PRE
T1
t
IH
(
(
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
)
)
)
)
)
)
)
)
)
(
(
(
(
(
(
(
(
(
t
(
)
(
)
(
)
(
)
(
)
(
)
(
)
)
)
)
)
)
)
)
)
)
RP
4
AR
Ta0
49
(
(
(
(
)
(
(
t
(
(
(
(
(
)
(
)
)
)
)
)
(
)
(
)
(
)
(
)
)
(
)
)
)
)
(
(
RFC
(
)
(
(
(
(
(
(
(
)
(
)
)
)
)
)
(
)
(
)
(
)
(
)
)
)
)
)
)
512Mb: x16, x32 Mobile LPDDR SDRAM
4
Tb0
AR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
(
)
)
RFC
)
)
)
)
)
)
)
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
)
)
Load standard
mode register
4
t
t
t
Op-code
Op-code
BA0 = L,
IS
IS
IS
BA1 = L
Tc0
LMR
t
t
t
IH
IH
IH
(
(
(
(
t
)
)
)
)
(
(
(
(
(
(
)
)
)
)
(
(
(
)
)
MRD
(
(
(
(
(
)
(
)
(
)
)
)
)
)
)
)
)
(
(
(
(
(
(
)
)
)
)
(
(
(
)
)
(
)
(
)
(
)
)
)
)
Load extended
mode register
4
Op-code
Op-code
BA0 = L,
BA1 = H
LMR
Td0
© 2004 Micron Technology, Inc. All rights reserved.
t
MRD
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
)
)
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
)
)
4
ACT
Te0
Row
Bank
Row
Initialization
3
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
)
)
(
)
(
(
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
)
(
(
)
)
)
)
)
)
)
)
)
(
)
Don’t Care
NOP
Tf0
3