S9S08DZ60F2MLF Freescale Semiconductor, S9S08DZ60F2MLF Datasheet - Page 345

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S9S08DZ60F2MLF

Manufacturer Part Number
S9S08DZ60F2MLF
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S08DZ60F2MLF

Rohs
yes
Core
HCS08
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Processor Series
MC9S08DZ60

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0
Freescale Semiconductor
TPMxCNTH:TPMxCNTL
TPMxCNTH:TPMxCNTL
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
TPMxMODH:TPMxMODL = 0x0007
TPMxCnVH:TPMxCnVL = 0x0005
EPWM mode
EPWM mode
(in TPMv2 and TPMv3)
(in TPMv2 and TPMv3)
TPMv2 TPMxCHn
TPMv2 TPMxCHn
CLKSB:CLKSA BITS
CLKSB:CLKSA BITS
TPMv3 TPMxCHn
TPMv3 TPMxCHn
ELSnB:ELSnA BITS
ELSnB:ELSnA BITS
RESET (active low)
RESET (active low)
MSnB:MSnA BITS
MSnB:MSnA BITS
The following procedure can be used in TPM v3 (when the channel pin is also a port pin) to emulate
the high-true EPWM generated by TPM v2 after the reset.
BUS CLOCK
BUS CLOCK
Figure 0-1. Generation of high-true EPWM signal by TPM v2 and v3 after the reset
Figure 0-2. Generation of low-true EPWM signal by TPM v2 and v3 after the reset
CHnF BIT
CHnF BIT
00
00
00
00
MC9S08DZ60 Series Data Sheet, Rev. 4
00
00
0
0
10
10
10
01
Chapter 16 Timer/PWM Module (S08TPMV3)
1 2 3 4 5 6 7
1 2 3 4 5 6 7
01
01
0 1
0 1
2
2
...
...
345

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