IDT70T3539MS133BC IDT, Integrated Device Technology Inc, IDT70T3539MS133BC Datasheet
IDT70T3539MS133BC
Specifications of IDT70T3539MS133BC
800-1381
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IDT70T3539MS133BC Summary of contents
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... Features: True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 3.6ns (166MHz)/4.2ns (133MHz)(max.) – Industrial: 4.2ns (133MHz) (max.) Selectable Pipelined or Flow-Through output mode Counter enable and repeat features Dual chip enables allow for depth expansion without ...
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... Description: The IDT70T3539M is a high-speed 512K x 36 bit synchronous Dual- Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Pin Configuration (1,2,3,4) 10/07/ TDI NC A 17L I/O NC TDO A 18L 18L I/O I/O V ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Pin Names Left Port Right Port Chip Enables (Input R/W R/W Read/Write Enable (Input Output Enable ...
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... Counter Set to last valid ADS load (n) I/O , BEn and OE and BEn , the rising edge of CLK, regardless of all other memory control signals including CE IL 6.42 5 Industrial and Commercial Temperature Ranges (1,2,3,4) Byte 1 Byte 0 I/O I/O MODE 18-26 9-17 0-8 High-Z High-Z Deselected–Power Down ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Recommended Operating Temperature and Supply Voltage Commercial Industrial NOTES: 1. This is the parameter TA. This is the "instant on" case temperature. Recommended DC Operating Conditions with V Symbol NOTES: ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Absolute Maximum Ratings Symbol Rating V V Terminal Voltage TERM with Respect to GND DD ( Terminal Voltage TERM DDQ (V ) with Respect to ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter CE I Dynamic Operating DD L Current (Both Outputs Disabled, Ports Active MAX CE ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM AC Test Conditions (V Input Pulse Levels (Address & Controls) Input Pulse Levels (I/Os) Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT ∆ tCD ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing) Symbol t Clock Cycle Time (Flow-Through) CYC1 (1) t Clock Cycle Time (Pipelined) CYC2 t Clock High ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Read Cycle for Pipelined Operation (1,2) (FT/PIPE = CYC2 t CH2 CLK ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Timing Waveform of a Multi-Device Pipelined Read t CYC2 t t CH2 CL2 CLK ADDRESS 0 (B1 0(B1) DATA OUT(B1) ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Left Port Write to Pipelined Right Port Read CLK "A" R/W "A " ADDRESS "A" MATCH ...
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... CNTEN, and REPEAT = Addresses do not have to be accessed sequentially since ADS = V are for reference use only. 4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity. Timing Waveform of Pipelined Read-to-Write-to-Read ( OE Controlled) t CYC2 t t CH2 CLK ...
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... Output state (High, Low, or High-impedance) is determined by the previous cycle control signals BEn, and ADS = V , CNTEN, and REPEAT = Addresses do not have to be accessed sequentially since ADS = V reference use only. 4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Pipelined Read with Address Counter Advance t CYC2 t t CH2 CLK ADDRESS t t SAD HAD ADS CNTEN ( ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Timing Waveform of Write with Address Counter Advance (Flow-through or Pipelined Inputs) t CYC2 t CH2 CLK ADDRESS (3) INTERNAL An ADDRESS t t SAD ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Waveform of Interrupt Timing CLK R ADDRESS (3) L 7FFFF ( INS INT ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Waveform of Collision Timing CLK L t OFS ( ADDRESS L COL L CLK (4) ADDRESS ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Timing Waveform - Entering Sleep Mode R/W Timing Waveform - Exiting Sleep Mode R/W OE DATA OUT (4) NOTES IH. 2. All timing is same ...
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... Both ports writing - there is a risk that the two ports will interfere with each other, and the data stored in memory will not be a valid write from either port (it may essentially be a random combination of the two) ...
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... IDT70T3539M Control Inputs JTAG Functionality and Configuration The IDT70T3539M is composed of two independent memory arrays, and thus cannot be treated as a single JTAG device in the scan chain. The two arrays (A and B) each have identical characteristics and commands but must be treated as separate entities in JTAG operations. ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM JTAG Timing Specifications t JF TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS, ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Identification Register Definitions Value Instruction Field Array B Array B Revision Number (31:28) 0x0 IDT Device ID (27:12) 0x333 IDT JEDEC ID (11:1) 0x33 ID Register Indicator Bit (Bit 0) ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Ordering Information XXXXX A 999 A Device Power Speed Package Type Temperature IDT Clock Solution for IDT70T3539M Dual-Port Dual-Port I/O Specitications IDT Dual-Port Part Number Voltage I/O 70T3539M 3.3/2.5 LVTTL ...
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IDT70T3539M High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM Datasheet Document History: 10/08/03: Initial Datasheet 10/20/03: Page 1 Added "Includes JTAG functionality" to features Page 25 Added IDT Clock Solution Table 12/04/03: Page 10 Added t symbol and parameter ...