W9864G6JH-6 Winbond Electronics, W9864G6JH-6 Datasheet - Page 9

• Manufacturer Part Number: W9864G6JH-6
• Description: IC SDRAM 64MB 166MHZ 54TSOPII
• Manufacturer: Winbond Electronics

Specifications of W9864G6JH-6

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.3 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-TSOP II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.11 Burst Stop Command
A Burst Stop Command may be used to terminate the existing burst operation but leave the bank
open for future Read or Write Commands to the same page of the active bank, if the burst length is full
page. Use of the Burst Stop Command during other burst length operations is illegal. The Burst Stop
Command is defined by having RAS and CAS high with CS and WE low at the rising edge of
the clock. The data DQs go to a high impedance state after a delay, which is equal to the CAS
Latency in a burst read cycle, interrupted by Burst Stop.
7.12 Addressing Sequence of Sequential Mode
A column access is performed by increasing the address from the column address which is input to
the device. The disturb address is varied by the Burst Length as shown in Table 2.
7.13 Addressing Sequence of Interleave Mode
A column access is started in the input column address and is performed by inverting the address bit
in the sequence shown in Table 3.
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
DATA
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
DATA
ACCESS ADDRESS
n + 1
n + 2
n + 3
n + 4
n + 5
n + 6
n + 7
Table 2 Address Sequence of Sequential Mode
Table 3 Address Sequence of Interleave Mode
n
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
ACCESS ADDRESS
- 9 -
BL = 8 (disturb addresses are A0, A1 and A2)
BL = 4 (disturb addresses are A0 and A1)
No address carry from A0 to A1
No address carry from A1 to A2
No address carry from A2 to A3
BL = 2 (disturb address is A0)
BURST LENGTH
Publication Release Date: Aug. 31, 2010
W9864G6JH
BURST LENGTH
BL = 2
BL = 4
BL = 8
Revision A02