IDT70V28L15PFG IDT, Integrated Device Technology Inc, IDT70V28L15PFG Datasheet - Page 9

IC SRAM 1MBIT 15NS 100TQFP

IDT70V28L15PFG

Manufacturer Part Number
IDT70V28L15PFG
Description
IC SRAM 1MBIT 15NS 100TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT70V28L15PFG

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
1M (64K x 16)
Speed
15ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
Density
1Mb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
16b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
235mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Word Size
16b
Number Of Words
64K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
70V28L15PFG
800-1393

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70V28L15PFG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70V28L15PFG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70V28L15PFGI
Manufacturer:
THOMBETT
Quantity:
3 072
Timing Waveform of Semaphore Read after Write Timing, Either Side
NOTES:
1. CE = V
2. "DATA
Timing Waveform of Semaphore Write Contention
NOTES:
1. D
2. All timing is the same for left and right ports. Port "A" may be either left or right port. "B" is the opposite from port "A".
3. This parameter is measured from R/W
4. If t
IDT70V28L
High-Speed 3.3V 64K x 16 Dual-Port Static RAM
OR
SPS
= D
A
SEM
is not satisfied,the semaphore will fall positively to one side or the other, but there is no guarantee which side will be granted the semaphore flag.
OUT
R/W
IH
0
OL
-A
I/O
OE
or UB and LB = V
VALID" represents all I/O's (I/O
= V
2
IL
, CE
SIDE
SIDE
L
= CE
IH
R
(2)
(2)
= V
for the duration of the above timing (both write and read cycle) (Refer to Chip Enable Truth Table).
"A"
"B"
IH
or both UB and LB = V
t
AS
"A"
VALID ADDRESS
or SEM
A
A
0
t
AW
- I/O
0"A"
0"B"
SEM
SEM
Write Cycle
R/W
R/W
15
-A
-A
"A"
) equal to the semaphore value.
t
t
2"A"
2"B"
going HIGH to R/W
WP
EW
"A"
"A"
"B"
"B"
DATA
IH
(Refer to Chip Enable Truth Table).
t
DW
IN
t
WR
VALID
t
DH
"B"
MATCH
or SEM
t
9
SWRD
"B"
MATCH
going HIGH.
t
VALID ADDRESS
SPS
t
t
SOP
Read Cycle
SOP
t
SAA
Industrial and Commercial Temperature Ranges
t
t
AOE
ACE
(1,3,4)
DATA
VALID
OUT
4849 drw 10
t
OH
(2)
.
4849 drw 09
.
(1)

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