ATXMEGA256A3-MU Atmel, ATXMEGA256A3-MU Datasheet - Page 93

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ATXMEGA256A3-MU

Manufacturer Part Number
ATXMEGA256A3-MU
Description
8-bit Microcontrollers - MCU 8/16 bit 1.6V-3.6V 256KB + 8KB
Manufacturer
Atmel
Datasheet

Specifications of ATXMEGA256A3-MU

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
AVR
Data Bus Width
8 bit/16 bit
Maximum Clock Frequency
32 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
QFN EP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
I2C, SPI, USART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
50
Number Of Timers
7
Processor Series
ATXMega
Program Memory Type
Flash
Factory Pack Quantity
260
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.6 V
36. Errata
36.1
36.1.1
8068T–AVR–12/10
ATxmega256A3
rev. E
1. Bandgap voltage input for the ACs cannot be changed when used for both ACs
2. VCC voltage scaler for AC is non-linear
Bandgap voltage input for the ACs can not be changed when used for both ACs simultaneously
VCC voltage scaler for AC is non-linear
ADC has increased INL error for some operating conditions
ADC gain stage output range is limited to 2.4 V
ADC Event on compare match non-functional
Bandgap measurement with the ADC is non-functional when VCC is below 2.7V
Accuracy lost on first three samples after switching input to ADC gain stage
Configuration of PGM and CWCM not as described in XMEGA A Manual
PWM is not restarted properly after a fault in cycle-by-cycle mode
BOD will be enabled at any reset
DAC is nonlinear and inaccurate when reference is above 2.4V or VCC - 0.6V
DAC has increased INL or noise for some operating conditions
DAC refresh may be blocked in S/H mode
Conversion lost on DAC channel B in event triggered mode
EEPROM page buffer always written when NVM DATA0 is written
Pending full asynchronous pin change interrupts will not wake the device
Pin configuration does not affect Analog Comparator Output
NMI Flag for Crystal Oscillator Failure automatically cleared
Crystal start-up time required after power-save even if crystal is source for RTC
RTC Counter value not correctly read after sleep
Pending asynchronous RTC-interrupts will not wake up device
TWI Transmit collision flag not cleared on repeated start
Clearing TWI Stop Interrupt Flag may lock the bus
TWI START condition at bus timeout will cause transaction to be dropped
TWI Data Interrupt Flag (DIF) erroneously read as set
WDR instruction inside closed window will not issue reset
simultaneously
If the Bandgap voltage is selected as input for one Analog Comparator (AC) and then
selected/deselected as input for another AC, the first comparator will be affected for up to
1 µs and could potentially give a wrong comparison result.
Problem fix/Workaround
If the Bandgap is required for both ACs simultaneously, configure the input selection for both
ACs before enabling any of them.
The 6-bit VCC voltage scaler in the Analog Comparators is non-linear.
XMEGA A3
93

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