ST62T18CB6 STMicroelectronics, ST62T18CB6 Datasheet - Page 13

• Manufacturer Part Number: ST62T18CB6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 8K SPI/UAR
• Manufacturer: STMicroelectronics

Specifications of ST62T18CB6

• Core: ST6
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 7948 B
• Data Ram Size: 192 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 6 V
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 7
• Data Rom Size: 64 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Program Memory Type: EPROM
• Factory Pack Quantity: 20
• Supply Voltage - Max: 6 V
• Supply Voltage - Min: 3.6 V

1.4 PROGRAMMING MODES
1.4.1 Option Bytes
The two Option Bytes allow configuration capabili-
ty to the MCUs. Option byte’s content is automati-
cally read, and the selected options enabled, when
the chip reset is activated.
It can only be accessed during the programming
mode. This access is made either automatically
(copy from a master device) or by selecting the
OPTION BYTE PROGRAMMING mode of the pro-
grammer.
The option bytes are located in a non-user map.
No address has to be specified.
EPROM Code Option Byte (LSB)
EPROM Code Option Byte (MSB)
D15-D13. Reserved. Must be cleared.
ADC SYNCHRO. When set, an A/D conversion is
started upon WAIT instruction execution, in order
to reduce supply noise. When this bit is low, an A/
D conversion is started as soon as the STA bit of
the A/D Converter Control Register is set.
UART FRAME . When set, UART transmission
and reception are based on a 11-bit frame. When
cleared, a 10-bit frame is used.
D10. Reserved . This bit must be cleared
EXTCNTL. External STOP MODE control. . When
EXTCNTL is high, STOP mode is available with
watchdog active by setting NMI pin to one. When
PRO-
TECT
15
7
-
OSCIL
-
PORT
PULL
-
SYNCHRO
ADC
-
PULL
NMI
FRAME
UART
PULL
TIM
-
WDACT
EXTC-
NTL
GEN
OS-
LVD
0
8
EXTCNTL is low, STOP mode is not available with
the watchdog active.
LVD. LVD RESET enable. When this bit is set, safe
RESET is performed by MCU when the supply
voltage is too low. When this bit is cleared, only
power-on reset or external RESET are active.
PROTECT. Readout Protection. This bit allows the
protection of the software contents against piracy.
When the bit PROTECT is set high, readout of the
OTP contents is prevented by hardware.. When
this bit is low, the user program can be read.
OSCIL. Oscillator selection . When this bit is low,
the oscillator must be controlled by a quartz crys-
tal, a ceramic resonator or an external frequency.
When it is high, the oscillator must be controlled by
an RC network, with only the resistor having to be
externally provided.
PORT PULL . Port Pull-Up. This bit must be set
high to have pull-up input state at reset on the I/O
port. When this bit is low, I/O ports are in input
without pull-up (high impedance state at reset).
D4. Reserved. Must be set to 1.
NMI PULL. NMI Pull-Up . This bit must be set high
to configure the NMI pin with a pull-up resistor.
When it is low, no pull-up is provided.
TIM PULL. TIM Pull-Up . This bit must be set high
to configure the TIMER pin with a pull-up resistor.
When it is low, no pull-up is provided.
WDACT. This bit controls the watchdog activation.
When it is high, hardware activation is selected.
The software activation is selected when WDACT
is low.
OSGEN. Oscillator Safe Guard . This bit must be
set high to enable the Oscillator Safe Guard.
When this bit is low, the OSG is disabled.
The Option byte is written during programming ei-
ther by using the PC menu (PC driven Mode) or
automatically (stand-alone mode).
ST62T18C/E18C
13/82
13