ST62T18CB6 STMicroelectronics, ST62T18CB6 Datasheet - Page 53

• Manufacturer Part Number: ST62T18CB6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 8K SPI/UAR
• Manufacturer: STMicroelectronics

Specifications of ST62T18CB6

• Core: ST6
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 7948 B
• Data Ram Size: 192 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 6 V
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 7
• Data Rom Size: 64 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Program Memory Type: EPROM
• Factory Pack Quantity: 20
• Supply Voltage - Max: 6 V
• Supply Voltage - Min: 3.6 V

4.5 U. A. R. T. (Universal Asynchronous Receiver/Transmitter)
The UART provides the basic hardware for asyn-
chronous serial communication which, combined
with an appropriate software routine, gives a serial
interface providing communication with common
baud rates (up to 76,800 Baud with an 8MHz ex-
ternal oscillator) and flexible character formats.
Operating in Half-Duplex mode only, the UART
uses a 10-bit frame or a 11-bit frame according to
the choosen MCU option. Automatic parity bit gen-
eration is software selectable in the 10-bit charac-
ter format allowing either 7 data bit + 1 parity bit, or
8 data bit transmission. Transmitted data is sent di-
rectly, while received data is buffered allowing fur-
ther data characters to be received while the data
is being read out of the receive buffer register. Data
transmit has priority over data being received.
The UART is supplied with an MCU internal clock
that is also available in WAIT mode of the processor.
Figure 30. UART Block Diagram
f
OSC
BAUD RATE x 8
INTERRUPTS
WRITE
READ
RX and TX
D8 D7 D6 D5 D4 D3 D2 D1 D0
DIN
CONTROL REGISTER
RECEIVE BUFFER
PROGRAMMABLE
DATA SHIFT
BAUD RATE
DETECTOR
REGISTER
REGISTER
DIVIDER
START
UARTOE
DOUT
D8
TXD
4.5.1 Ports Interfacing
RXD reception line and TXD emission line are
sharing the same external pins as two I/O lines.
Therefore, UART configuration requires to set
these two I/O lines through the relevant ports reg-
isters. The I/O line common with RXD line must be
defined as input mode (with or without pull-up)
while the I/O line common with TXD line must be
defined as output mode (Push-pull or open drain).
In the 11-bit character format option, the transmit-
ted data is inverted and can therefore use a single
transistor buffering stage. Defined as input, the
RXD line can be read at any time as an I/O line
during the UART operation. The TXD pin follows I/
O port registers value when UARTOE bit is
cleared, which means when no serial transmission
is in progress. As a consequence, a permanent
high level has to be written onto the I/O port in or-
der to achieve a proper stop condition on the TXD
line when no transmission is active.
DR
1
0
MUX
ST62T18C/E18C
TXD1
RXD1
VR02009
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