EVAL-ADXL344Z Analog Devices, EVAL-ADXL344Z Datasheet - Page 15

• Manufacturer Part Number: EVAL-ADXL344Z
• Description: Daughter Cards & OEM Boards EB
• Manufacturer: Analog Devices
• Series: ADXL344r

Specifications of EVAL-ADXL344Z

• Rohs: yes
• Product: Breakout Boards
• Description/function: 3 axis accelerometer evaluation board
• Interface Type: I2C, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.7 V to 2.75 V
• Factory Pack Quantity: 1
• For Use With: ADXL344

Data Sheet
I
With CS tied high to V
requiring a simple 2-wire connection as shown in Figure 28.
The
and User Manual, Rev. 03—19 June 2007, available from NXP
Semiconductor. It supports standard (100 kHz) and fast (400 kHz)
data transfer modes if the bus parameters given in Table 11 and
Table 12 are met. Single- or multiple-byte reads/writes are sup-
ported, as shown in Figure 29. With the ALT ADDRESS pin
(Pin 7) high, the 7-bit I
by the R/ W bit. This translates to 0x3A for a write and 0x3B for
a read. An alternate I
bit) can be chosen by grounding the ALT ADDRESS pin. This
translates to 0xA6 for a write and 0xA7 for a read.
There are no internal pull-up or pull-down resistors for any
unused pins; therefore, there is no known state or default state
for the CS or ALT ADDRESS pin if left floating or unconnected.
It is required that the CS pin be connected to V
the ALT ADDRESS pin be connected to either V
when using I
Table 11. I
Parameter
Digital Input
Digital Output
Pin Capacitance
1
2
Limits are based on characterization results; not production tested.
C
Low Level Input Voltage (V
High Level Input Voltage (V
Low Level Input Current (I
High Level Input Current (I
Low Level Output Voltage (V
Low Level Output Current (I
1
NOTES
1. THE SHADED AREAS REPRESENT WHEN THE DEVICE IS LISTENING.
ADXL344
SINGLE-BYTE WRITE
MASTER START
SLAVE
MULTIPLE-BYTE WRITE
MASTER START
SLAVE
SINGLE-BYTE READ
MASTER START
SLAVE
MULTIPLE-BYTE READ
MASTER START
SLAVE
THIS START IS EITHER A RESTART OR A STOP FOLLOWED BY A START.
2
C Digital Input/Output
2
C.
conforms to the UM10204 I
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
2
C address of 0x53 (followed by the R/ W
2
DD I/O
C address for the device is 0x1D, followed
, the
IL
IH
IL
)
IH
OL
)
)
OL
)
)
)
ADXL344
ACK
ACK
ACK
ACK
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
2
is in I
C-Bus Specification
DD I/O
DD I/O
2
C mode,
Test Conditions
V
V
V
V
V
f
IN
IN
IN
DD I/O
DD I/O
OL
and that
= 1 MHz, V
= V
= 0 V
= V
ACK
ACK
ACK
ACK
or GND
< 2 V, I
≥ 2 V, I
Figure 29. I
DD I/O
OL, max
START
START
1
1
Rev. 0 | Page 15 of 40
OL
OL
IN
SLAVE ADDRESS + READ
SLAVE ADDRESS + READ
DATA
DATA
= 3 mA
= 3 mA
= 2.6 V
2
C Device Addressing
Due to communication speed limitations, the maximum output
data rate when using 400 kHz I
a change in the I
at 100 kHz limits the maximum ODR to 200 Hz. Operation at an
output data rate above the recommended maximum may result
in an undesirable effect on the acceleration data, including
missing samples or additional noise.
If other devices are connected to the same I
operating voltage level of these other devices cannot exceed V
by more than 0.3 V. External pull-up resistors, R
proper I
and User Manual, Rev. 03—19 June 2007, when selecting pull-up
resistor values to ensure proper operation.
ACK
ACK
Min
0.7 × V
−0.1
3
STOP
ACK
ACK
2
C operation. Refer to the UM10204 I
DD I/O
DATA
Figure 28. I
ALT ADDRESS
ADXL344
2
C communication speed. For example, using I
DATA
DATA
SDA
SCL
2
CS
ACK
C Connection Diagram (Address 0x53)
Limit
STOP
NACK
ACK
R
Max
0.3 × V
0.1
0.2 × V
400
8
V
P
1
DD I/O
2
C is 800 Hz and scales linearly with
STOP
DD I/O
DD I/O
R
P
DATA
PROCESSOR
D IN/OUT
D OUT
2
C bus, the nominal
2
C-Bus Specification
P
, are necessary for
NACK
ADXL344
Unit
V
V
µA
µA
V
mV
mA
pF
STOP
DD I/O
2
C