MA330026 Microchip Technology, MA330026 Datasheet - Page 316

• Manufacturer Part Number: MA330026
• Description: Daughter Cards & OEM Boards dsPIC33FJ16MC102 Plug-In Module
• Manufacturer: Microchip Technology

Specifications of MA330026

• Rohs: yes
• Product: Plug-In Modules
• Core: PIC
• Data Bus Width: 16 bit
• Description/function: dsPIC33F MC 28 Pin QFN to 100 Pin Plug-in-Module
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• For Use With: DM330021, DM330022, DM330023

dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
In-Circuit Debugger ........................................................... 234
In-Circuit Emulation........................................................... 227
In-Circuit Serial Programming (ICSP) ....................... 227, 234
Input Capture .................................................................... 147
Input Change Notification.................................................. 122
Instruction Addressing Modes............................................. 56
Instruction Set
Instruction-Based Power-Saving Modes ........................... 115
Internal RC Oscillator
Internet Address................................................................ 319
Interrupt Control and Status Registers................................ 80
Interrupt Setup Procedures ............................................... 106
Interrupt Vector Table (IVT) ................................................ 77
Interrupts Coincident with Power Save Instructions.......... 116
M
Memory Organization.......................................................... 37
Microchip Internet Web Site .............................................. 319
Modulo Addressing ............................................................. 58
Motor Control PWM........................................................... 153
Motor Control PWM Module
MPLAB ASM30 Assembler, Linker, Librarian ................... 244
MPLAB Integrated Development Environment Software .. 243
MPLAB PM3 Device Programmer..................................... 246
MPLAB REAL ICE In-Circuit Emulator System................. 245
MPLINK Object Linker/MPLIB Object Librarian ................ 244
N
NVM Module
O
Open-Drain Configuration ................................................. 122
Output Compare................................................................ 149
P
Packaging ......................................................................... 289
DS70652C-page 316
I2C1 Register Map ...................................................... 47
Registers ................................................................... 148
File Register Instructions ............................................ 56
Fundamental Modes Supported.................................. 57
MAC Instructions......................................................... 57
MCU Instructions ........................................................ 56
Move and Accumulator Instructions ............................ 57
Other Instructions........................................................ 57
Overview ................................................................... 238
Summary................................................................... 235
Idle ............................................................................ 116
Sleep ......................................................................... 115
Use with WDT ........................................................... 233
IECx ............................................................................ 80
IFSx............................................................................. 80
INTCON1 .................................................................... 80
INTCON2 .................................................................... 80
IPCx ............................................................................ 80
Initialization ............................................................... 106
Interrupt Disable........................................................ 106
Interrupt Service Routine .......................................... 106
Trap Service Routine ................................................ 106
Applicability ................................................................. 59
Operation Example ..................................................... 58
Start and End Address ................................................ 58
W Address Register Selection .................................... 58
6-Output Register Map................................................ 47
Register Map............................................................... 55
Details ....................................................................... 291
Marking ............................................................. 289, 290
Preliminary
PAD Configuration
Peripheral Module Disable (PMD) .................................... 116
Pinout I/O Descriptions (table)............................................ 17
PMD Module
PORTA
PORTB
Power-on Reset (POR)....................................................... 74
Power-Saving Features .................................................... 115
Program Address Space..................................................... 37
Program Memory
PWM Time Base............................................................... 157
R
Reader Response............................................................. 320
Register Map
Register Maps
Registers
Register Map .............................................................. 51
Register Map .............................................................. 55
Register Map .............................................................. 54
Register Map for dsPIC33FJ12MC201....................... 54
Register Map for dsPIC33FJ12MC202....................... 54
Clock Frequency and Switching ............................... 115
Construction ............................................................... 61
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation ..................... 62
Memory Map............................................................... 37
Table Read Instructions
Visibility Operation ...................................................... 64
Interrupt Vector ........................................................... 38
Organization ............................................................... 38
Reset Vector ............................................................... 38
Real-Time Clock and Calendar................................... 51
Comparator................................................................. 52
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 197
ADxCHS0 (ADCx Input Channel 0 Select ................ 198
ADxCON1 (ADCx Control 1)..................................... 193
ADxCON2 (ADCx Control 2)..................................... 195
ADxCON3 (ADCx Control 3)..................................... 196
ADxCSSL (ADCx Input Scan Select Low) ................ 199
ADxPCFGL (ADCx Port Configuration Low)............. 200
CLKDIV (Clock Divisor) ............................................ 112
CMSTAT (Comparator Status) ................................. 204
CMxCON (Comparator Control) ............................... 205
CMxFLTR (Comparator Filter Control) ..................... 211
CMxMSKCON (Comparator Mask Gating Control) .. 209
CMxMSKSRC (Comparator Mask Source Control) .. 207
CORCON (Core Control) ...................................... 30, 81
CTMUCON (CTMU Control) ............................. 224, 225
CTMUCON1 (CTMU Control Register 1).................. 224
CTMUCON1 (CTMU Control Register 2).................. 225
CTMUICON (CTMU Current Control) ....................... 226
CVRCON (Comparator Voltage Reference Control) 212
DEVID (Device ID).................................................... 231
DEVREV (Device Revision)...................................... 231
I2CxCON (I2Cx Control) ........................................... 177
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 181
I2CxSTAT (I2Cx Status) ........................................... 179
IEC0 (Interrupt Enable Control 0) ............................... 90
IEC1 (Interrupt Enable Control 1) ............................... 92
IEC2 (Interrupt Enable Control 2) ............................... 93
Space Visibility ................................................... 64
tions .................................................................... 63
TBLRDH ............................................................. 63
TBLRDL.............................................................. 63
© 2011 Microchip Technology Inc.