MA330026 Microchip Technology, MA330026 Datasheet - Page 37

• Manufacturer Part Number: MA330026
• Description: Daughter Cards & OEM Boards dsPIC33FJ16MC102 Plug-In Module
• Manufacturer: Microchip Technology

Specifications of MA330026

• Rohs: yes
• Product: Plug-In Modules
• Core: PIC
• Data Bus Width: 16 bit
• Description/function: dsPIC33F MC 28 Pin QFN to 100 Pin Plug-in-Module
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• For Use With: DM330021, DM330022, DM330023

4.0
The
dsPIC33FJ16MC101/102 architecture features sepa-
rate program and data memory spaces and buses. This
architecture also allows the direct access of program
memory from the data space during code execution.
FIGURE 4-1:
© 2011 Microchip Technology Inc.
Note:
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
MEMORY ORGANIZATION
This data sheet summarizes the features
of
dsPIC33FJ16MC101/102
devices. However, it is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 3. “Data Memory”
(DS70202) and Section 4. “Program
Memory” (DS70203) in the “dsPIC33F/
PIC24H Family Reference Manual”, which
are available from the Microchip web site
(www.microchip.com).
Note
dsPIC33FJ16GP101/102
the
1:
dsPIC33FJ16GP101/102
PROGRAM MEMORY MAP FOR dsPIC33FJ16GP101/102 AND
dsPIC33FJ16MC101/102 DEVICES
On reset, these bits are automatically copied into the device configuration shadow registers.
family
Interrupt Vector Table
Alternate Vector Table
and
Device Configuration
Flash Configuration
Shadow Registers
and
Preliminary
(5.6K instructions)
of
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
Reserved
DEVID (2)
Reserved
Reserved
Words
(1)
4.1
The
dsPIC33FJ16GP101/102 and dsPIC33FJ16MC101/
102 devices is 4M instructions. The space is
addressable by a 24-bit value derived either from the
23-bit Program Counter (PC) during program execution,
or from table operation or data space remapping as
described in
Data Memory
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory map for the dsPIC33FJ16GP101/102 and
dsPIC33FJ16MC101/102 family of devices is shown in
Figure
program
4-1.
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x002BFA
0x002BFC
0x002BFE
0x002COO
0x7FFFFE
0x800000
0xF7FFFE
0xF80000
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFFFFFE
Program Address Space
Section 4.6 “Interfacing Program and
Spaces”.
address
memory
DS70652C-page 37
space
of
the