DK-START-5AGXB3NES Altera Corporation, DK-START-5AGXB3NES Datasheet - Page 43

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DK-START-5AGXB3NES

Manufacturer Part Number
DK-START-5AGXB3NES
Description
Programmable Logic IC Development Tools FPGA Starter Kit For 5AGXFB3H4F
Manufacturer
Altera Corporation
Type
FPGAr
Datasheet

Specifications of DK-START-5AGXB3NES

Rohs
yes
Product
Starter Kits
Tool Is For Evaluation Of
5AGXB3
For Use With
5AGXB3
Chapter 6: Board Test System
Configuring the FPGA Using the Quartus II Programmer
Configuring the FPGA Using the Quartus II Programmer
February 2013 Altera Corporation
f
f
The following sections describe the Clock Control controls.
Serial Port Registers
The Serial port registers control shows the current values from the Si571 registers.
For more information about the Si571 registers, refer to the Si570/Si571 data sheet
available on the Silicon Labs website (www.silabs.com).
fXTAL
The fXTAL control shows the calculated internal fixed-frequency crystal, based on the
serial port register values.
For more information about the f
Si570/Si571 data sheet available on the Silicon Labs website (www.silabs.com).
Target Frequency
The Target frequency control allows you to specify the frequency of the clock. Legal
values are between 10 and 810 MHz with eight digits of precision to the right of the
decimal point. For example, 421.31259873 is possible within 100 parts per million
(ppm). The Target frequency control works in conjunction with the Set New
Frequency control.
Read
This control reads the current frequency setting for the oscillator associated with the
active tab.
Clear/Default
This control sets the frequency for the oscillator associated with the active tab back to
its default value. This can also be accomplished by power cycling the board.
Set New Frequency
This control sets the programmable oscillator frequency for the selected clock to the
value in the Target frequency control for the Si571 and the Frequency controls for the
Si5338 (U4). Frequency changes might take several milliseconds to take effect. You
might see glitches on the clock during this time. Altera recommends resetting the
FPGA logic after changing frequencies.
You can use the Quartus II Programmer to configure the FPGA with a specific .sof.
Before configuring the FPGA, ensure that the Quartus II Programmer and the
USB-Blaster II driver are installed on the host computer, the USB cable is connected to
the starter board, power to the board is on, and no other applications that use the
JTAG chain are running.
To configure the Arria V GX FPGA, perform the following steps:
1. Start the Quartus II Programmer.
XTAL
value and how it is calculated, refer to the
Arria V GX Starter Kit
User Guide
6–21

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