DK-START-5AGXB3NES Altera Corporation, DK-START-5AGXB3NES Datasheet - Page 47

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DK-START-5AGXB3NES

Manufacturer Part Number
DK-START-5AGXB3NES
Description
Programmable Logic IC Development Tools FPGA Starter Kit For 5AGXFB3H4F
Manufacturer
Altera Corporation
Type
FPGAr
Datasheet

Specifications of DK-START-5AGXB3NES

Rohs
yes
Product
Starter Kits
Tool Is For Evaluation Of
5AGXB3
For Use With
5AGXB3
Appendix A: Programming the Flash Memory Device
Programming Flash Memory Using the Board Update Portal
Programming Flash Memory Using the Board Update Portal
Programming Flash Memory Using the Nios II EDS
February 2013 Altera Corporation
1
Once you have the necessary .flash files, you can use the Board Update Portal to
reprogram the flash memory. Refer to
Designs” on page 5–2
If you have generated a .sof that operates without a software design file, you can still
use the Board Update Portal to upload your design. In this case, leave the Software
File Name field blank.
The Nios II EDS offers a nios2-flash-programmer utility to program the flash memory
directly. To program the .flash files or any compatible S-Record File (.srec) to the
board using nios2-flash-programmer, perform the following steps:
1. Set the DIP switch FAC_LOAD (SW4.3) to the factory off (1) position (factory
2. Attach the USB-Blaster cable and power up the board.
3. If the board has powered up and the LCD displays either Connecting... or a valid IP
4. Launch the Quartus II Programmer to configure the FPGA with a .sof capable of
5. Click Add File and select <install
6. Turn on the Program/Configure option for the added file.
7. Click Start to download the selected configuration file to the FPGA. Configuration
8. On the Windows Start menu, click All Programs > Altera > Nios II EDS > Nios II
9. In the Nios II command shell, navigate to the <install
nios2-flash-programmer --base=0x00000000 <yourfile>_hw.flash r
10. After programming completes, if you have a software file to program, type the
nios2-flash-programmer --base=0x00000000 <yourfile>_sw.flash r
11. Set the DIP switch FAC_LOAD (SW4.3) to the user on (0) position position and
design) to load the Board Update Portal design from flash memory on power up.
address (such as 152.198.231.75), proceed to step 8. If no output appears on the
LCD or if the Config Done LED (D12) does not illuminate, continue to step
load the FPGA with a flash-writing design.
flash programming. Refer to
Programmer” on page 6–21
dir>\kits\arriaVGX_5agxfb3hf35_start\factory_recovery\a5gx_starter_fpga_bu
p_top.sof.
is complete when the progress bar reaches 100%. The Config Done LED (D12)
illuminates indicating that the flash device is ready for programming.
Command Shell.
dir>\kits\arriaVGX_5agxfb3hf35_start\factory_recovery directory (or to the
directory of the .flash files you created in
EDS” on page
following Nios II EDS command:
power cycle the board. The Config Done LED (D12) illuminates indicating that the
flash device is ready for programming.
A–2) and type the following Nios II EDS command:
for more information.
for more information.
“Configuring the FPGA Using the Quartus II
“Using the Board Update Portal to Update User
“Creating Flash Files Using the Nios II
Arria V GX Starter Kit
User Guide
4
to
A–3

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