IS42S32160B-7TL ISSI, Integrated Silicon Solution Inc, IS42S32160B-7TL Datasheet - Page 18
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IS42S32160B-7TL
Manufacturer Part Number
IS42S32160B-7TL
Description
IC SDRAM 512MBIT 143MHZ 86TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Specifications of IS42S32160B-7TL
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
512M (16M x 32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TSOPII
Organization
16Mx32
Density
512Mb
Address Bus
15b
Access Time (max)
6.5/5.4ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IS42S32160B-7TLI
Manufacturer:
ISSI
Quantity:
1 000
I
IS42S32160B
18
•
•
This bit is used to select the burst write length.
8
9
Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to “00”in normal operation.
Write Burst Length (A9)
No-Operation command
(RAS#=”H”,CAS#=”H”,WE#=”H”)
is Low).This prevents unwanted commands from being registered during idle or wait states.
Burst Stop command
(RAS#=”H”,CAS#=”H”,WE#=”L”)
The Burst Stop command is used to terminate either fixed-length or full-page bursts.This
command is only effective in a read/write burst without the auto precharge function.The terminated
read burst ends after a delay equal to the CAS#latency (refer to the following figure).The
termination of a write burst is shown in the following figure.
CAS# latency=2
tCK2,DQ’s
CL K
COMMAN D
CAS# latency=2,3
DQ’s
CLK
COMMAND
CAS# latency=3
tCK3,DQ’s
Termination of a Burst Read Operation (Burst Length > 4,CAS#Latency =2,3)
A9
0
1
A8
0
0
1
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS#
READ A
T0
T0
Termination of a Burst Write Operation (Burst Length =X)
NOP
Write Burst Length
Burst
Single Bit
A7
0
1
X
WRITE A
DIN A 0
T 1
T 1
NOP
Test Mode
normal mode
Vendor Use Only
Vendor Use Only
DOUT A 0
DIN A 1
T2
NOP
T2
NOP
DOUT A 0
DOUT A 1
DIN A 2
T3
NOP
T3
NOP
Input Data for the Write is masked.
Burst Stop
Burst Stop
don’t care
DOUT A 2
DOUT A 1
T4
T4
Integrated Silicon Solution, Inc. — www.issi.com
DOUT A 2
DOUT A 3
T5
NOP
The Burst ends after a delay equal to the CAS# latency.
T5
NOP
DOUT A 3
T6
NOP
T6
NOP
T7
NOP
T7
NOP
I
NOP
T 8
NOP
T 8
Rev. 00C
03/27/08
®