RC28F128M29EWLA NUMONYX, RC28F128M29EWLA Datasheet - Page 17

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RC28F128M29EWLA

Manufacturer Part Number
RC28F128M29EWLA
Description
IC FLASH 128MBIT 25NS 64BGA
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of RC28F128M29EWLA

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16Mx8, 8Mx16)
Speed
60ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RC28F128M29EWLA
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Numonyx
2.9
2.10
2.11
2.12
2.13
®
Axcell™ M29EW
Reset (RST#)
The Reset pin can be used to apply a Hardware Reset to the memory. A hardware reset is
achieved by holding Reset Low, V
memory will be ready for Bus Read and Bus Write operations after t
or t
Reset AC
Ready/Busy output (RY/BY#)
The Ready/Busy pin is an open-drain output that can be used to identify when the device is
performing a program or erase operation. During program or erase operations Ready/Busy
is Low, V
Read mode, Auto Select mode and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See
Figure
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A low value will then indicate that one, or more, of the
memories is busy. The 10K ohm or bigger resistor is recommended as pull-up resistor to
achieve 0.1V V
Byte/Word organization select (BYTE#)
The BYTE# pin is used to switch between the x8 and x16 Bus modes of the memory. When
Byte/Word organization select is Low, V
the memory is in x16 mode.
V
V
command interface is disabled when V
Write operations from accidentally corrupting the data during power-up, power-down and
power surges. The operation will abort, and the memory contents being altered will thus be
invalid, if the V
A 0.1 µF capacitor should be connected between the V
ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during program and erase operations (see
I
V
V
independently from V
CC1
CC
CCQ
CC
CCQ
RHGL
, I
provides the power supply for all operations (Read, Program and Erase). The
CC2
provides the power supply to the I/O pins; it enables the I/Os to be powered
supply voltage
30.
), whichever occurs last. See
input/output supply voltage
OL
, I
characteristics,
CC3
(see
CC
OL
in
Table 17: Status Register
.
drops below V
Table 22: DC
CC
.
Figure 29
Table 26: Reset AC
characteristics).
LKO
IL
208031-04
, for at least t
and
while the Program/Erase controller is running.
Section 2.10: Ready/Busy output
CC
IL
Figure 30
, the memory is in x8 mode, when it is High, V
is
bits). Ready/Busy is high-impedance during
Lockout voltage, V
PLPX
for more details.
characteristics,
. After Reset goes High, V
CC
supply voltage pin and the V
LKO
PHEL
Figure 29
. This prevents Bus
Signal Descriptions
(RY/BY#),
or t
RHEL
and
IH
, the
(or t
Table 26:
PHGL
SS
IH
,
17

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