RC28F128M29EWLA NUMONYX, RC28F128M29EWLA Datasheet - Page 37

• Manufacturer Part Number: RC28F128M29EWLA
• Description: IC FLASH 128MBIT 25NS 64BGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of RC28F128M29EWLA

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16Mx8, 8Mx16)
• Speed: 60ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Numonyx
6.2.2
6.2.3
®
Axcell™ M29EW
Quadruple Byte/Word Program command
The Quadruple Byte/Word Program command for 32-Mbit and 64-Mbit devices is used to
write a page of four adjacent bytes/words in parallel. The four bytes/words must differ for
addresses A0, DQ15/A-1 in x8 mode or addresses A1, A0 in x16 mode. Five bus write
cycles are necessary to issue the Quadruple Byte/Word Program command:
1.
2.
3.
4.
5.
See
commands, 16-bit mode
Octuple Byte Program command
The Octuple Byte Program command for 32-Mbit and 64-Mbit devices is used to write a
page of eight adjacent bytes in parallel. The eight bytes must differ for addresses A1, A0,
DQ15/A-1 in x8 mode only. Nine bus write cycles are necessary to issue the Octuple Byte
Program command:
1.
2.
3.
4.
5.
6.
7.
8.
9.
See
commands, 16-bit mode
Table 11: Fast Program commands, 8-bit mode
Table 11: Fast Program commands, 8-bit mode
The first bus cycle sets up the Quadruple Byte/Word Program command.
The second bus cycle latches the Address and the Data of the first byte/word to be
programmed.
The third bus cycle latches the Address and the Data of the second byte/word to be
programmed.
The fourth bus cycle latches the Address and the Data of the third byte/word to be
programmed.
The fifth bus cycle latches the Address and the Data of the fourth byte/word to be
programmed and starts the Program/Erase Controller.
The first bus cycle sets up the Octuple Byte Program command.
The second bus cycle latches the Address and the Data of the first byte to be
programmed.
The third bus cycle latches the Address and the Data of the second byte to be
programmed.
The fourth bus cycle latches the Address and the Data of the third byte to be
programmed.
The fifth bus cycle latches the Address and the Data of the fourth byte to be
programmed.
The sixth bus cycle latches the Address and the Data of the fifth byte to be
programmed.
The seventh bus cycle latches the Address and the Data of the sixth byte/word to be
programmed.
The eighth bus cycle latches the Address and the Data of the seventh byte/word to be
programmed.
The ninth bus cycle latches the Address and the Data of the eighth byte/word to be
programmed and starts the Program/Erase Controller.
for command details.
for command details.
208031-04
and
and
Table 12: Fast Program
Table 12: Fast Program
Command Interface
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