IDT70V3389S5BF8 IDT, Integrated Device Technology Inc, IDT70V3389S5BF8 Datasheet
IDT70V3389S5BF8
Specifications of IDT70V3389S5BF8
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IDT70V3389S5BF8 Summary of contents
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... Features True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 4.2/5/6ns (max.) – Industrial: 5ns (max) Pipelined output mode Counter enable and reset features Dual chip enables allow for depth expansion without ...
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... High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Description: The IDT70V3389 is a high-speed 64K x 18 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Pin Configuration (1,2,3,4) 12/12/ I ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Pin Configuration (1,2,3,4) 12/12/01 A 14L A 15L DDQL 10L IO 10R V DDQR 11L ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Pin Names Left Port Right Port Chip Enables , , R/W R/W Read/Write Enable Output Enable L ...
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... External Address Blocked—Counter disabled (Ap reused) I/O ( (p+1) Counter Enabled—Internal Address generation I/O , BEn and OE and BEn , the rising edge of CLK, regardless of all other memory control signals including CE IL Recommended DC Operating Conditions with V (1) Symbol GND 3.3V 150mV V DDQ + 0V 3.3V ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM (1) Capacitance (T = +25° 1.0MH ) TQFP ONLY A Z Symbol Parameter Conditions C Input Capacitance V IN (3) C Output Capacitance V OUT NOTES: 1. ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter CE and CE I Dynamic Operating DD L Current (Both Outputs Disabled, (1) Ports Active) f ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM AC Test Conditions Input Pulse Levels (Address & Controls) Input Pulse Levels (I/Os) Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load 50Ω DATA OUT Figure ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM AC Electrical Characteristics Over the Operating Temperature Range (Read and Write Cycle Timing 3.3V ± 150mV 0°C to +70° Symbol Parameter t Clock ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Timing Waveform of Read Cycle for Pipelined Operation t CYC2 t CH2 CLK UB, LB (0-3) W ...
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... UB, LB, and ADS = V , CNTEN, and CNTRST = Addresses do not have to be accessed sequentially since ADS = V are for reference use only. 4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity. NO MATCH (3) t CD2 . IH for the Left Port, which is being written to. ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Timing Waveform of Pipelined Read-to-Write-to-Read ( OE Controlled) t CYC2 t t CH2 CL2 CLK UB, LB ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Timing Waveform of Write with Address Counter Advance t CYC2 t t CH2 CL2 CLK ADDRESS (3) INTERNAL (7) An ADDRESS t t SAD ...
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... LOW to HIGH transition of the clock signal. An asynchronous output enable is provided to ease asyn- chronous bus interfacing. Counter enable inputs are also provided to stall the operation of the address counters for fast interleaved memory applications. A HIGH LOW on CE for one clock cycle will power down ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Ordering Information XXXXX A 99 Device Power Speed Package Type NOTES: 1. Contact your local sales office for Industrial temp range in other speeds, packages and powers. 2 Green ...
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IDT70V3389S High-Speed 64K x 18 3.3V Dual-Port Synchronous Pipelined Static RAM Datasheet Document History (cont'd) 01/18/99: Initial Public Release 03/15/99: Page 9 Additional notes 04/28/99: Added fpBGA paclage 06/08/99: Page 2 Changed package body height from 1.5mm to 1.4mm 06/15/99: ...