MT48V8M16LFB4-10 IT:G Micron Technology Inc, MT48V8M16LFB4-10 IT:G Datasheet - Page 27
![IC SDRAM 128MBIT 100MHZ 54VFBGA](/photos/7/22/72286/557-54-fbga_sml.jpg)
MT48V8M16LFB4-10 IT:G
Manufacturer Part Number
MT48V8M16LFB4-10 IT:G
Description
IC SDRAM 128MBIT 100MHZ 54VFBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC8M16LFB4-75MG_TR.pdf
(80 pages)
Specifications of MT48V8M16LFB4-10 IT:G
Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
128M (8Mx16)
Speed
100MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 27 of 80
- Download datasheet (3Mb)
Figure 11:
READs
Figure 12:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
Example: Meeting
READ Command
COMMAND
READ bursts are initiated with a READ command, as shown in Figure 12.
The starting column and bank addresses are provided with the READ command, and
auto precharge is either enabled or disabled for that burst access. If auto precharge is
enabled, the row being accessed is precharged at the completion of the burst. For the
READ commands used in the following illustrations, auto precharge is disabled.
During READ bursts, the valid data-out element from the starting column address will
be available following CL after the READ command. Each subsequent data-out element
will be valid by the next positive clock edge. Figure 13 on page 28 shows general timing
for each possible CL setting.
x16: A0–A8
x32: A0–A7
CLK
BA0,BA1
A9, A11
RAS#
CAS#
WE#
CLK
CKE
A10
CS#
t
ACTIVE
RCD (MIN) When 2 <
T0
HIGH
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
NOP
T1
ADDRESS
ADDRESS
COLUMN
BANK
t
RCD
27
DON’T CARE
t
RCD (MIN)/
T2
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile SDRAM
t
CK< 3
READ or
T3
WRITE
DON’T CARE
©2001 Micron Technology, Inc. All rights reserved.
T4
READs
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