MT48H16M16LFBF-75:G TR Micron Technology Inc, MT48H16M16LFBF-75:G TR Datasheet - Page 28
![IC SDRAM 256MBIT 132MHZ 54VFBGA](/photos/7/22/72286/557-54-fbga_sml.jpg)
MT48H16M16LFBF-75:G TR
Manufacturer Part Number
MT48H16M16LFBF-75:G TR
Description
IC SDRAM 256MBIT 132MHZ 54VFBGA
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Specifications of MT48H16M16LFBF-75:G TR
Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (16Mx16)
Speed
132MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-VFBGA
Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
8/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
80mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1326-2
COMMAND INHIBIT
NO OPERATION (NOP)
LOAD MODE REGISTER (LMR)
ACTIVE
Figure 8: ACTIVE Command
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
The COMMAND INHIBIT function prevents new commands from being executed by
the device, regardless of whether the CLK signal is enabled. The device is effectively de-
selected. Operations already in progress are not affected.
The NO OPERATION (NOP) command is used to perform a NOP to the selected device
(CS# is LOW). This prevents unwanted commands from being registered during idle or
wait states. Operations already in progress are not affected.
The mode registers are loaded via inputs A[n:0] (where An is the most significant ad-
dress term), BA0, and BA1(see Mode Register (page 40)). The LOAD MODE REGISTER
command can only be issued when all banks are idle and a subsequent executable com-
mand cannot be issued until
The ACTIVE command is used to activate a row in a particular bank for a subsequent
access. The value on the BA0, BA1 inputs selects the bank, and the address provided
selects the row. This row remains active for accesses until a PRECHARGE command is
issued to that bank. A PRECHARGE command must be issued before opening a differ-
ent row in the same bank.
BA0, BA1
Address
RAS#
CAS#
WE#
CKE
CLK
CS#
HIGH
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Bank address
Row address
t
28
MRD is met.
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
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