NAND01GW3B2AN6F STMicroelectronics, NAND01GW3B2AN6F Datasheet - Page 18
![IC FLASH 1GBIT 48TSOP](/photos/7/26/72669/497-48-tsop_series_sml.jpg)
NAND01GW3B2AN6F
Manufacturer Part Number
NAND01GW3B2AN6F
Description
IC FLASH 1GBIT 48TSOP
Manufacturer
STMicroelectronics
Datasheet
1.NAND01GW3B2CN6E.pdf
(61 pages)
Specifications of NAND01GW3B2AN6F
Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
1G (128M x 8)
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NAND01GW3B2AN6F
Manufacturer:
ST
Quantity:
101
Bus operations
4.5
4.6
18/61
Write Protect
Write Protect bus operations are used to protect the memory against program or erase
operations. When the Write Protect signal is Low the device will not accept program or erase
operations and so the contents of the memory array cannot be altered. The Write Protect
signal is not latched by Write Enable to ensure protection even during power-up.
Standby
When Chip Enable is High the memory enters standby mode, the device is deselected,
outputs are disabled and power consumption is reduced.
Table 5.
1. Only for x16 devices.
2. WP must be V
Table 6.
1. Any additional address input cycles will be ignored.
2. The fifth cycle is valid for 2-Gbit devices. A28 is for 2-Gbit devices only.
Bus cycle
Command input
Bus operation
Address input
Write Protect
Data output
Data input
5
Standby
2
3
1
4
th(2)
nd
st
rd
th
(1)
Bus operations
Address insertion, x8 devices
IH
I/O7
A19
A27
V
V
A7
when issuing a program or erase command.
IL
IL
V
V
V
V
V
E
X
IH
IL
IL
IL
IL
I/O6
A18
A26
V
AL
V
V
V
V
V
A6
X
X
IH
IL
IL
IL
IL
IL
V
CL
V
V
V
X
X
IH
IL
IL
IL
I/O5
A17
A25
V
V
A5
IL
IL
Falling
V
V
V
R
X
X
IH
IH
IH
I/O4
A16
A24
V
V
A4
Rising
Rising
Rising
IL
IL
V
W
X
X
IH
V
I/O3
A11
A15
A23
V
A3
WP
X
IL
V
V
X
X
D
IL
(2)
IH
/V
IL
NAND01G-B2B, NAND02G-B2C
D
Data output
I/O0 - I/O7
Command
Data input
I/O2
Address
A10
A14
A22
V
A2
IL
X
X
I/O1
A13
A21
V
A1
A9
IL
I/O8 - I/O15
Data output
Data input
X
X
X
X
I/O0
A12
A20
A28
A0
A8
(1)