NAND128W3A0AN6F STMicroelectronics, NAND128W3A0AN6F Datasheet - Page 31
![IC FLASH 128MBIT 48TSOP](/photos/7/26/72669/497-48-tsop_series_sml.jpg)
NAND128W3A0AN6F
Manufacturer Part Number
NAND128W3A0AN6F
Description
IC FLASH 128MBIT 48TSOP
Manufacturer
STMicroelectronics
Datasheet
1.NAND128W3A2BN6E.pdf
(56 pages)
Specifications of NAND128W3A0AN6F
Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
128M (16M x 8)
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-
The Second Level Wear-leveling is triggered when
the difference between the maximum and the min-
imum number of write cycles per block reaches a
specific threshold.
Error Correction Code
An Error Correction Code (ECC) can be imple-
mented in the Nand Flash memories to identify
and correct errors in the data.
For every 2048 bits in the device it is recommend-
ed to implement 22 bits of ECC (16 bits for line par-
ity plus 6 bits for column parity).
An ECC model is available in VHDL or Verilog.
Contact the nearest ST Microelectronics sales of-
fice for more details.
Figure 24. Error Detection
New ECC generated
First Level Wear-leveling, new data is
programmed to the free blocks that have had
the fewest write cycles
Second Level Wear-leveling, long-lived data is
copied to another block so that the original
block can be used for more frequently-
changed data.
XOR previous ECC
22 bit data = 0
with new ECC
during read
YES
All results
No Error
= zero?
NO
11 bit data = 1
Correctable
YES
= zero?
>1 bit
Error
NO
1 bit data = 1
ECC Error
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
ai08332
Hardware Simulation Models
Behavioral simulation models. Denali Software
Corporation models are platform independent
functional models designed to assist customers in
performing entire system simulations (typical
VHDL/Verilog). These models describe the logic
behavior and timings of NAND Flash devices, and
so allow software to be developed before hard-
ware.
IBIS simulations models. IBIS (I/O Buffer Infor-
mation Specification) models describe the behav-
ior of the I/O buffers and electrical characteristics
of Flash devices.
These models provide information such as AC
characteristics, rise/fall times and package me-
chanical data, all of which are measured or simu-
lated at voltage and temperature ranges wider
than those allowed by target specifications.
IBIS models are used to simulate PCB connec-
tions and can be used to resolve compatibility is-
sues when upgrading devices. They can be
imported into SPICETOOLS.
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