M45PE80-VMN6TP NUMONYX, M45PE80-VMN6TP Datasheet - Page 38

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M45PE80-VMN6TP

Manufacturer Part Number
M45PE80-VMN6TP
Description
IC FLASH 8MBIT 50MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M45PE80-VMN6TP

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
8M (1M x 8)
Speed
50MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Package
8SOIC N
Cell Type
NOR
Density
8 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3.3 V
Sector Size
64KByte x 16
Timing Type
Synchronous
Interface Type
Serial-SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
M45PE80-VMN6TPCT

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Table 14.
1. t
2. Value guaranteed by characterization, not 100% tested in production.
3. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1.
4. When using PP and PW instructions to update consecutive Bytes, optimized timings are obtained with one sequence
5. int(A) corresponds to the upper integer part of A. E.g. int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
38/48
Symbol
t
t
t
WHSL
SHWL
SHQZ
t
t
t
t
t
t
t
t
t
t
t
t
t
RDP
t
t
DVCH
CHDX
CHSH
SHCH
PW
CLQV
CLQX
CH
SLCH
CHSL
SHSL
DP
PP
CL
including all the Bytes versus several sequences of only a few Bytes (1 . n . 256).
t
t
t
CH
f
f
PE
SE
W
C
R
(1)
(1)
(2)
(4)
(4)
(2)
(2)
+ t
(3)
(3)
CL
must be greater than or equal to 1/ f
t
t
t
t
t
Alt.
t
DSU
t
CSH
t
CLH
CSS
CLL
DIS
HO
f
DH
t
AC characteristics (75 MHz operation)
C
V
Clock frequency for the following instructions:
FAST_READ, RDLR, PW, PP, WRLR, PE, SE,
SSE, DP, RDP, WREN, WRDI, RDSR, WRCR
Clock frequency for READ instructions
Clock High time
Clock Low time
Clock slew rate
S active setup time (relative to C)
S not active hold time (relative to C)
Data in setup time
Data in hold time
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
Output disable time
Clock Low to Output Valid under 30 pF / 10 pF
Output hold time
Write Protect setup time
Write Protect hold time
S to Deep Power-down
S High to Standby mode
Write status register cycle time
Page Write cycle time (256 bytes)
Page Program cycle time (256 bytes)
Page Program cycle time (n bytes)
Page Erase cycle time
Sector Erase cycle time
Test conditions specified in
(2)(2)
Parameter
(peak to peak)
C
Table 8
Min.
D.C.
D.C.
100
100
0.1
20
6
6
5
5
2
5
5
5
0
and
Table 9
int(n/8) × 0.025
Typ.
0.8
10
11
3
1
(5)
Max.
8/6
75
33
30
15
23
20
8
3
3
5
MHz
MHz
V/ns
Unit
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
μs
s

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