NAND01GR3B2BZA6E NUMONYX, NAND01GR3B2BZA6E Datasheet - Page 7

• Manufacturer Part Number: NAND01GR3B2BZA6E
• Description: IC FLASH 1GBIT 63VFBGA
• Manufacturer: NUMONYX

Specifications of NAND01GR3B2BZA6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 1G (128M x 8)
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 63-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

NAND01G-B2B, NAND02G-B2C
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Description
The NAND01G-B2B and NAND02G-B2C devices belong to the 2112-byte/1056-word page
family of non-volatile flash memories that uses NAND cell technology. The devices range
from 1 Gbit to 2 Gbits and operate with either a 1.8 V or 3 V voltage supply. The size of a
page is either 2112 bytes (2048 + 64 spare) or 1056 words (1024 + 32 spare) depending on
whether the device has a x8 or x16 bus width.
The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8 or
x16 input/output bus. This interface reduces the pin count and makes it possible to migrate
to other densities without changing the footprint.
Each block can be programmed and erased over 100,000 cycles (with ECC on). To extend
the lifetime of NAND flash devices, the implementation of an error correction code (ECC) is
mandatory.
The devices feature a write protect pin that allows performing hardware protection against
program and erase operations.
The devices feature an open-drain ready/busy output that can be used to identify if the
program/erase/read (P/E/R) controller is currently active. The use of an open-drain output
allows the ready/busy pins from several memories to be connected to a single pull-up
resistor.
A Copy Back Program command is available to optimize the management of defective
blocks. When a page program operation fails, the data can be programmed in another page
without having to resend the data to be programmed.
Each device has cache program and cache read features which improve the program and
read throughputs for large files. During cache programming, the device loads the data in a
cache register while the previous data is transferred to the page buffer and programmed into
the memory array. During cache reading, the device loads the data in a cache register while
the previous data is transferred to the I/O buffers to be read.
All devices have the chip enable don’t care feature, which allows code to be directly
downloaded by a microcontroller, as chip enable transitions during the latency time do not
stop the read operation.
The devices are available in the following packages:
and come with two security features:
These security features are subject to an NDA (non-disclosure agreement) and are,
therefore, not described in the datasheet. For more details about them, refer to the nearest
Numonyx sales office.
TSOP48 (12 x 20 mm)
VFBGA63 (9.5 x 12 x 1 mm, 0.8 mm pitch) for NAND02G-B2C devices
VFBGA63 (9 x 11 x 1.05 mm, 0.8 mm pitch) for NAND01G-B2B devices
OTP (one time programmable) area, which is a restricted access area where sensitive
data/code can be stored permanently
Serial number (unique identifier) option, which allows each device to be uniquely
identified.
Description
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